Assuming that both clock waveforms are the same, all you need to measure clock difference is a wideband AC voltmeter: just measure between the clocks. At 0 degrees phase shift you get 0V differential voltage, at 180 degrees you get some maximum value (~V_hi at very low frequencies, less as you go past 1MHz).
A wideband AC voltmeter can be a simple demodulator probe - see e.g.this example. To get the sensitivity down to 0V, you'll need to offset one of the waveforms "down", but this is easy to do since the offset voltage can be a scaled voltage from a 3V coin lithium battery. For example:
simulate this circuit – Schematic created using CircuitLab
The voltmeter is a DC voltmeter (e.g. multimeter). L1 and L2 can be parts designated as RF chokes, their power rating is not important since there'll be negligible DC currents flowing through them. You may have better results with slightly smaller or larger chokes, depending on their parasitics. I'd try several values between 1-100uH with 180 degree out-of-phase clocks (i.e. one output inverted), and select for highest DC voltage reading. Do not assume anything about the chokes, i.e. test every pair you have, rather than stopping - parasitics are important, and you may get several local sensitivity maxima.
To adjust zero: connect CLK1 to CLK2 (of course no FPGA connection). Adjust for a slightly positive voltage, e.g. 0.01V on mV scale. Then connect CLK1 and CLK2 to two otherwise identical FPGA outputs. The voltmeter will read close to the zero-adjusted voltage when the clocks have no phase offset. Small phase offsets will be detectable in, say, 300mVDC range on the multimeter. With VIO at 3.3V, you'll get 10-20 degrees of phase shift full scale.
The zero voltage should be adjusted each time the chokes are changed, before taking further voltage readings.
I've laid the circuit out symmetrically as far as practical, to aid in linearity. It'll help to keep this arrangement on the perfboard, or even just laid out over a small copper laminate used as the ground plane. I wouldn't bother with a solderless breadboard.
It is very important that both clocks come from output pins on the FPGA, so that they are driven with identical driver circuits. Do not take one clock directly from the oscillator. Use two dedicated outputs, configured for highest drive strength available.
Most voltmeters have high impedance (10MOhm for typical multimeters), so that's why there's a discharge resistor R2 across C6.