I'm trying to use a ROHM BD9F800MUX (buck PMIC regulator with synchronous regulation.)

Upon looking at their footprint guide, it has something I have not seen before and is poorly documented.

It appears they have a large solder pad with 3 circles removed from it that I assume is just bare PCB with no silk screen.

My two thoughts:

  1. This is to prevent solder from blobbing on the pad, but usually that is controlled by the amount of solder placed on the pad to begin with.
  2. This is supposed to be a thermal via etc, but it is too large of diameter I think.

Question: Would people agree this is just bare board without silkscreen, or is this supposed to be a via or something else?

enter image description here


Update: Further reading after Janka gave me confidence of thermal vias. I found that this layout is recommended by Actel (Microsemi) in their QFN packages.

Apparently 1.2mm x 3mm vias are popular for thermal via relief, although their examples all seem to be on significantly larger surface areas where solder wicking would be less of an issue I imagine. link to AN

What set me off on the wrong foot was their recommended layout, where it strongly looks like they are not using thermals under the package.

enter image description here

I think this question is answered for any future people.

  • \$\begingroup\$ It's vias for sure. Yeah, 0.3mm vias are pretty large but still not unusual. \$\endgroup\$
    – Janka
    Commented Oct 9, 2021 at 15:39
  • \$\begingroup\$ @Janka - Would this have to be a filled via? Or for that pad size would an assembler allow that? Maybe this is the reason these chips are in stock during the shortage, because if the board requires via capping... I'll have to find another option. \$\endgroup\$
    – MadHatter
    Commented Oct 9, 2021 at 15:42
  • \$\begingroup\$ Vias under pad can be problematic : they may suck solder away from the pad resulting in worse contact (unless filled, as you suggest). Different PCB assembly processes may prefer either the footprint or example PCB layout. \$\endgroup\$
    – user16324
    Commented Oct 9, 2021 at 17:59

1 Answer 1


Or is this supposed to be vias

If you look at the thermal specifications in the data sheet for the device it says this: -

enter image description here

This implies to me that if you are using a PCB board based on JESD51-7 you should use thermal vias to connect the large copper solder pad to copper on other layers. That to me implies that the circles are thermal vias to copper on other layers.


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