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I was told that that impedance matching is important when going to high speeds on USB.

I assume that the "impedance" matching in practice means "reactance" matching.

But, how can you do that, since(by definition, as it's is a communication line) you don't know what the signal will look like? I mean:

a) In one extreme, (in binary) 101010101010101010101..... b) In the other extreme a loooong bunch of ones, the same with zeros (or 255 and 0 or however you describe it)

In other words, the frequency being anything between DC and bps/2 ?

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    \$\begingroup\$ Impedance in this context refers to characteristic impedance and it is affected by resistance, inductance, and capacitance. At high frequencies, characteristic Impedance is largely not affected by frequency, but rather the materials and geometry of the transmission line. In other words, it becomes purely real. So at high frequencies, your signal will not really affect the characteristic impedance of the transmission line. \$\endgroup\$ Oct 14, 2021 at 14:56
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    \$\begingroup\$ I assume that the "impedance" matching in practice means "reactance" matching. - no, it means impedance matching. \$\endgroup\$
    – Andy aka
    Oct 14, 2021 at 14:58
  • \$\begingroup\$ Thanks a lot, Andy + sorry for poorly written question! (Obvioulsy I meant that I thought he frequency dependent stuff would affect it enough to need to be considered, but I sure agree one needs to use the terms correctly!) \$\endgroup\$
    – Tuomo
    Oct 14, 2021 at 15:04
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    \$\begingroup\$ FYI Although a sequence of "1" bits involve no transitions, you can only have 6 of them before a 0 is bit stuffed, and 0 is transmitted as a toggle of the data lines. So there is a minimum frequency of changes on the line, see en.wikipedia.org/wiki/USB_(Communications)#Signaling_(USB_PHY) \$\endgroup\$
    – Martin
    Oct 14, 2021 at 15:33
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    \$\begingroup\$ I think Martin's comment is the actual best answer here. You (the asker) have successfully noticed a fundamental problem in digital data transmission, which is that you need a balance of high and low voltage states on the line, in order to avoid various problems at the electrical layer. The resolution of your confusion is that we NEVER transmit long runs of the same voltage level, on pretty much any digital transmission line. The signal is always encoded in some way to prevent this. EDIT:... although hacktastical's answer suggests I'm wrong about the reason here. \$\endgroup\$ Oct 15, 2021 at 1:45

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Matching the impedance does not mean just reactance matching and the transmitted data or frequency content does not matter when the impedance is properly matched.

USB data lines have 90 ohm wave impedance so a transmission line with infinite length would look like a 90 ohm resistor for a DC signal that is applied forever as the electromagnetic wave travels in the cable. Which is why a transmission line with finite length such as cable must be terminated with 90 ohms to make it look like it is infinite in length and transmitted data pulses will not see a discontinuity in the impedance and thus do not get reflected back from receiver to transmitter.

USB signal spectrum does not go down to DC because it uses line encoding called bit stuffing - the data won't be constant DC as if there are too many bits without a transition, then an extra transition is added to forcibly make a transition to keep the receiver and transmitter in sync.

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The USB cable is a transmission line with a characteristic impedance (90 ohms nominal.) ‘Impedance matching’, in this context, means terminating the line in its characteristic impedance to avoid reflections and thus ensure good signal integrity.

The USB2 DP/DM lines are half-duplex bidirectional, so need to be terminated at one end or the other, depending on the data direction and whether full or high speed is in use. The SuperSpeed pairs are unidirectional so only need to be terminated at the receiving end.

The DP/DM pair also has specific pull-up / pull-down behavior to identify cable plug-in, sense the downstream peripheral speed, and sense the upstream power delivery capability. It also has non-differential states that perform reset and other housekeeping. Note that this behavior is separate from the impedance terminating setup.

The USB PHY and controller take care of all these issues for you. Your job as a board or system designer is only to ensure the correct impedance on the board and in the cable.

Finally, the DP/DM pair is considered to be a DC signal, and has no inherent sensitivity to run lengths of zeroes or ones even though the protocol limits run lengths of each through ‘bit stuffing’, done so that the USB2 receiver PHY can stay locked on to it and recover the data. The SuperSpeed pairs are AC coupled, and thus use encoding to ensure that there is no DC bias introduced, a technique it shares with PCI Express, SATA and other serdes protocols.

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