# Using shared pull-down resistor or providing pull-down for each mosfet

There are some P channel and N channel mosfets which operate as swiches in figure 1. Also, there is a pull-down resistor for each mosfet which prevents the mosfet's gate being float when the VCC is not present.

However, in 2nd design all those resisters have been eliminated. They've been replaced with only one resistor which is shared between all mosfets. This resistor also acts as a pull-down resistor for gates (If it is not a pull-down resistor let me know).

The purpose of these designs is to work as switches when the button has been pressed and they are not intended to function in high frequencies.

The question is that which of them is more appropriate for this purpose and what is the difference between each design?

Circuit 2 is better, it has fewer components and likely wastes less power. The circuit could be simplified even further by deleting the resistors to each gate, assuming Vcc is less than the max allowed gate-source voltage (Vgs max).

If in fact there is a need to limit the gate-source voltage, a single series resistor to the Vcc switch to one pull-down resistor can accomplish that. As below:

simulate this circuit – Schematic created using CircuitLab

This may have been the motivation for Circuit 1: each pair forms a voltage divider for gate drive. I can’t say for certain without knowing the details about the voltage and the FET being used.

• It may also waste more power but it really depends on the resistance values in each circuit. Oct 17, 2021 at 21:13
• It doesn't seem more wasteful to me - R7 and R8 don't conduct any DC until the switch is closed, which is exactly what OP's original two circuits did anyway. 6 times in the first one. Oct 18, 2021 at 2:07

There is very little difference. Neither circuit is more appropriate but the one with less resistors just has less resistiors.

First circuit just has pull-downs at each gate directly while there are also separate series gate resistors. Somebody might have noticed there basically is effective amount of pull down at multiple resistors at each gate and simplified the effective pull down to be a single resistor to use less resistors.

Without knowing the resistor values or what is the purpose of the circuit it is hard to say which one is better - for example the one with more resistors can be better depending on VCC as gates have a certain voltage limit so you might need voltage dividers.

Rg shared in fig 2 allows Vgs=Vcc which may be suitable for Vcc< Vgs max .

Fig 1 attenuates Vcc to Vgs so this is suitable for Vcc >=20V but could be done like fig 2 with a single R from Vcc to divider.

However Rg is rarely needed for current limiting an ON/Off switch as the Ciss input capacitance on PWM high slew rate inputs is the only reason Rg in series is used to minimize dynamic gate current power loss.