I wonder how it could be possible to do mixed circuits simulations. In my imagination, there is a circuit netlist which contains analog and digital components. Since XSPICE (and I think ngspice) has the possibility to implement digital circuits why shouldn't it be possible to define these digital circuits using a HDL such as Verilog or VHDL? There is even a paper showing how to combine HDL and SPICE simulations [10.1109/ICCD.2001.955043].

During my research I found there are some open source tools which claim to have these properties.

Here are a few:

  1. eSIM which uses the GHDL tool

  2. QUCS

When it comes the mixed circuit simulations none of the provide the promised experience. In both cases, I am not able to implement a simulation of a VHDL written digital component in combination with an analog SPICE circuit.

  • Has anyone managed to implement such a simulation in any of the mentioned or maybe different open source tools?
  • Is there a paid proprietary tool which is able to implement this kind of simulations?
  • Am I looking completely in the wrong direction and this is not the best way to perform mixed analog and digital simulations?
  • \$\begingroup\$ have a look at VHDL-AMS \$\endgroup\$
    – user16222
    Oct 19, 2021 at 11:11

3 Answers 3


With the recent issue ngspice-42 (Dec. 27th, 2023) we have integrated the capability of co-simulation of digital Verilog circuit blocks with analog and digital ngspice netlists.

Verilator is used to compile the Verilog code into a shared library, which then is attached to ngspice for event based digital or mixed-signal simulation.

Please have a look at https://ngspice.sourceforge.io/extras.html.


To mix two simulation paradigm (SPICE, VHDL) you need a package that supports both. These however are few and far between. SIMextrix is a SPICE simulator but can also accept Verilog HDL.

One option is CO-Simulation permitting one simulation domain to communicate with another. Matlab for instance can simulate some SPICE parts and can co-simulate with MODELSIM.

Finally, there is VHDL-AMS, the analogue extension to VHDL. You however do need to write the SPICE model equations in VHDL-AMS.


library IEEE;
use IEEE.math_real.all;
use IEEE.electrical_systems.all;

-- this is the entity
entity DIODE is
   generic (iss : current := 1.0e-14;  
            af  : real    := 1.0;      
            kf  : real    := 0.0);     
   port (terminal anode, cathode : electrical);      
end entity DIODE;

architecture IDEAL of DIODE is
  quantity v across i through anode to cathode;
  constant vt : voltage := 0.0258;     

  i == iss * (exp(v/vt) - 1.0);

end architecture IDEAL;
  • \$\begingroup\$ Thank you so much for your answer. I know that Matlab/Simulink offers this possibility. I am looking more for an open source tool to build my own application. Do you know a good tool (preferable open source) to simulate VHDL-ams Code? Is there something like a parser to draw a schematic and then transfer the netlist to a VHDL-ams Top Module with wired "basic" components? \$\endgroup\$
    – Paul M
    Oct 19, 2021 at 12:57

After a while of searching I found this post on GitHub describing the issue verry well:


Here some ways are shown how to combine gHDL and different Spice tools.

My research on advanced, payed tools showed tat cadence would be most used tool for such mixed simulations.


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