First of all: what's the precision of your resistor and more importantly of your 3.3V voltage reference?
But most importantly:
Your divider network has a gain of 0.155. So your 24V become 3.72. You are triggering your zener and overranging your ADC (in that order). Your ideal range with this divider would be 21.29V (with 3.3V output assuming the zener is not breaking down)
Your zener has a tolerance range of 3.1 to 3.5V so you can't rely on having more than 3.1V on the output anyway (that would reduce the range to 20V). Also that's at 5mA, if you look at the curve it will start to 'leak' before (that's the zener soft knee).
Other possible issues: your divider has an output impedance of about 1.2k. In itself it's not an issue but need to be considered. From the graph the zener will start to leak at about 2.1V and that current will do bad things to your reading (some calculation needed). You only need about 80µA to have 0.1V error in the output signal.
Your relatively high output impedence could also impair settling of the sampling in your ADC (but your huge 100nF filter capacitor mitigates if); check your datasheet for the maximum output impedance recommended on the analog input or use a bigger sampling time (it depends on the part, the datasheet usually has the full story since it varies with the ADC architecture). The typical multiplexed SAR inside an MCU should handle it without too much issues.
I'd try to raise your upper divider resistor to 10k to enable the full range you need and replace the zener diode with a schottky clamp to 3.3V (which is indeed the thing inside the ADC you don't want to trigger with and overvoltage)