Does it matter how big the pull up resistor is for a comparator?
For a 12 V bi polar connected comparator that would mean 7.3 mA for the 3K3 and 4.7 mA for a 5K1.
Me thinks that's quite a lot if you want to use all the 4 units of the LM339.
Can I choose 22K?
Than it would be 1.1 mA.
revision:
As you have correctly surmised, the current through that pull-up resistor is effectively wasted power in the resistor, and you are right to raise this question.
The answer is mostly about what the comparator output is connected to. One consideration is output transistion speed, which will depend on the capacitance (or inductance) that the output is driving. For example, perhaps the comparator is driving a MOSFET gate, which has inherent capacitance modelled on the right here:
simulate this circuit – Schematic created using CircuitLab
The internal open-collector transistor of the comparator is able to pull its output down to 0V very quickly, but for the output to transition from low to high state, you are relying on R to source all current needed to charge C. Obviously, the lower R is, the more quickly the output can slew to a high voltage. In this scenario, if switching speed is of little concern, you can make R very high (see below for an upper limit), wasting less power.
Another factor to consider is resitive loading of the output. You must treat the pull-up resistor as you would in any situation where it forms part of a larger system of impedances. For instance, to implement input hysteresis (to form a schmitt trigger), you need to provide positive feedback from output to input, like this:
I used R1 and R2 to derive a switching "threshold" potential of about half of \$V_{CC}\$ at node X. Resistor R4 is allowing this threshold to be slightly modulated by the comparator output. This is no problem when the comparator output is low, because the output transistor can sink a lot of current, and drag the output all the way to 0V, but when the output is high, R3 forms a potential divider with R4, between \$V_{CC}\$ and whatever potential point X settles at. This means that the output voltage will always be less than the full \$V_{CC}\$.
The amount by which the output falls short of the full power supply potential might be problematic in some instances. In this example, the output is supposed to switch off the P-channel MOSFET when high. That output might not be quite high enough to do the job!
So the question now is "what range of values can I use for a pull-up resistor at the output of an LM393?"
The lower limit is defined by the maximum collector current that the comparator's output transistor is able to sink, which comes directly from the datasheet. On page 6 we have this information:
As you can see under "Output Sink Current", maximum collector current is typically 16mA, but if you are really unlucky that could be as low as 6mA. For a bullet-proof design, you should aim for a resistance that will pass at most 6mA when the output is low. For a power supply of 12V, that resistance would be at least:
$$ R = \frac{V}{I} = \frac{12V}{6mA} = 2k\Omega $$
The entry "Output Leakage Current" tells you that when the output is high, at +5V, the transistor can still pass 0.1nA of current. That's negligible in most cases. If you want to drop less than 100mV across the pull-up resistor, then use Ohm's law to find the maximum permissible resistance:
$$ R = \frac{V}{I} = \frac{0.1V}{0.1nA} = 1G\Omega $$
Clearly that is impractically large, and you'll never use a resistor any where near that. However, the situation worsens as the output voltage increases. On page 7 of the datasheet there's an entry for "Output Leakage Current" when the output is +30V:
That current is 1μA. To keep the voltage drop across the pull-up resistor under 100mV, you use at most this resistance:
$$ R = \frac{0.1V}{1\mu A} = 100k\Omega $$
The only other thing I can think of to mention, is that higher resistances are more noisy (probably not a concern for digitial comparator outputs), and more susceptible to interference due to inductive, capacitive or electromagnetic pickup. That's too big a topic for this answer, but the usual approach is to prefer smaller resistances over large.
It all depends on three things:
This works for low sampling rates like 10 ~50 kHz and the input differentiator is 10 us on the rising edge. The *T=RC=(100k+10k)100pF= 11 us but the one shot duration depends on the comparator threshold of 10k/110k * 12V and the signal returning from 5V-0.7V towards -0.7V
The negative feedback cap is bad news and just forms a relaxation oscillator of current ramps during the comparator off time.
The Comparator pullup R and C forms a time constant for delayed turn off delay to hold by adding RC= 5k1*100pF= 0.51 us of one shot duration to the 16 us so has no benefit there other than to suppress oscillations from the interference possible from the NFB cap that must to be removed.
Does it matter how big the pull up resistor is for a comparator?
Yes but it is not that critical so there is room for variation as required.
The S&H state is the fast for sample ON active with the active low state of the comparator. This one shot duration has low delay to begin sample and slower shutoff from the RC time constant of the pullup R.
If 5k1*100pF= ~ 0.5 us additional sample time is acceptable then you could consider 50k pullup, if the circuit trace and input capacitance was only 10pF. and remove both 100 pF caps.
Although if the 12V logic threshold was Vcc/2 rather than 63% of Vcc the turn off delay is only 0.5/0.63 of RC=T, so the FET gate threshold voltage will affect this trailing edge delay of the negative one shot output for sample depends on your ADC sampling rate and method of triggering Start conversion which must occur after the FET S&H has settled.
