http://www.unife.it/ing/lm.infoauto/sistemi-elaborazione/dispense/csf04_12.pdf
Page 2
My confusion:
- First peripheral device sends DREQ.
- DMAC makes HOLD=1.
- Microprocessor finishes current machine cycle and makes HLDA=1.
- DMAC makes DACK=1. Now DMAC is the system bus master.
How can we call DMAC the bus master when it doesn't hold data bus? Is it due to the fact that it can generate control signals we call it bus master? It controls the system bus. The processor can keep doing work that doesn't require the system bus.
Now what happens? How does data transfer from
- Peripheral device to memory
- Memory to peripheral device
Most books simply write data transfer occurs but don't explain this.
My hypothesis:
Say we want to write to peripheral:
DMAC gives IOW to memory, then data starts transferring from memory to peripheral device via the data bus.
Where does it write? At what location does it write? There is no address bus connected to the peripheral device.