Verbal Kint's answer covers pretty much everything, but I thought it worthwhile to wrap up this loose end:
Isn't it better to operate at the resonant frequency, with PWM to regulate the output?
This can be done, but care is needed.
Note that, for typical output networks, we can use a steady-state sinusoidal approximation, i.e. ignoring the harmonics of the inverter's square-wave output. This is justified because the network is largely inductive at harmonic frequencies, so the harmonics go as 1/N in voltage, and 1/N2 in current (a somewhat triangular ripple waveform), and together amount to <10% of inverter output (apparent power), a fairly small error.
In short, we can model the resonant network as an RLC circuit at the fundamental frequency, and ignore the effect of harmonics entirely.
To ensure ZVS, we require an inductive load. That is, at the instant of turn-off, some inverter current persists, pushing switch node voltage (i.e., flowing into the switch capacitances) fully to the opposite supply rail (commutation), at which point the opposing transistor can turn on at a leisurely pace (i.e., delayed by some "dead time", and give or take gate resistance if any), before load current reverses and it must be turned on to continue repeating the cycle.
Why care is needed
That necessary inductive current can only circulate if the inverter maintains a low output impedance (CV characteristic). If the inverter should go open-circuit, then the reactive current would discharge as a flyback pulse and subsequent ringdown; the node voltage becomes much harder to follow, then (the ringing might be at some MHz, and give or take propagation delay through the controller and driver, it might not be able to turn on coincident with the respective valley point -- if it were designed to handle operation in this regime at all).
Now, we're generally working with bridge circuits, so the output is never fully high-impedance, and flyback is constrained to at most the supply voltage -- but this is only true while the (unclamped) flyback amplitude would exceed the supply voltage. If reactive current were very low, it might be that the switch node voltage only commutates partway, resulting in the opposite side transistor turning on into a large voltage drop (and producing a sudden transient in the switching loop) -- increasing emissions and switching loss.
And so, if we consider the half-bridge inverter, with variable duty cycle gate drive (in the normal balanced modulation ala TL494 and friends), we find a problem: as we decrease PWM%, at first, nothing happens (reactive current holds the voltage against the rail); eventually, conduction angle drops below the load phase angle* and inverter voltage "lifts off" the rail just before the opposite transistor finally turns on. For even lower PWM%, it might fully rebound (to the opposite side), or bounce back (nearly all the way) again; etc.
*Not exactly that comparison, but reverse conduction angle is a function of load phase angle.
In short, the control law is extremely nonlinear: at high PWM%, nothing happens (well, efficiency drops slightly as synchronous rectification is lost); at medium PWM%, losses increase dramatically while power output decreases only modestly; and at low PWM%, power output decreases non-monotonically as the voltage rings down between pulses.
What can we do about it?
The key observation is that the half-bridge goes open-circuit (an undesirable condition) when neither switch is activated, and we have no further degrees of freedom (only one or the other switch can be on, or neither; both would cause an explosion :) ). Using MOSFETs with body diodes (or IGBTs with co-pack diodes, etc.), we get an extra switch "for free" during the dead time, when some inductive current is present -- hence the flexible dead-time period. But beyond that, we need to employ additional circuitry to enforce the low-Z condition that our system (the resonant network) requires.
The half-bridge can be adapted into the three-level inverter, where a bipolar supply is used, and an additional (bidirectional) leg shorts the network to the supply midpoint, inbetween the +/- pulses.
The full bridge can be used directly, where instead of pulsing opposite corners (i.e. the basic half-bridge case paired with its inversion), we drive both sides with full square waves, phase-shifting one leg relative to the other -- phase-shift pulse width modulation (PSPWM). This way, the inverter's output is always 100% driven (fully defined) and thus low impedance, but the voltage difference between legs (i.e., where the output network is wired, what it sees) is a bipolar pulse wave with variable duty cycle.
(Note that we get an identical waveform from the half-bridge forward converter in CCM; but in that case, the output is held low due to output inductor current circulating through the rectifier.)
In any case, having a continuous low-Z inverter output, allows the fundamental component to vary nearly proportionally, and thus a reasonable control law is obtained.
The major downsides to these are, the greatly increased complexity of a three-leg inverter (a bootstrap gate driver can be used with the added leg, at least), or the greatly increased EMI of a full bridge PSPWM scheme (notice the network/transformer sees a common-mode waveform of 100% full inverter switching edges!). The PSPWM also drives the inverter itself at full wave regardless of load condition; adequate load current must still flow to ensure ZVS, restricting the load area (i.e. permissible range of Z = R + jX of the output network) at low duty cycle, or else incurring hard switching loss/EMI. There are also fewer controllers available for PSPWM, or, additional logic is required to drive a three-leg inverter.
Regardless, note that we would still drive the inverter slightly above resonance, to maintain ZVS; a phase-locked loop might be used to implement this. (Which has the downside that phase error is proportional to output level, but this isn't a concern for fixed-output supplies; it's more of a concern for wide-range variable supplies, or induction heating.)
In comparison, the main downside of frequency modulation is, the compensation (time constant) varies as the difference between driven and resonant frequencies. For typical LLC networks, the Q factor is very low (less than 1), so the peaking is nonexistent and response is nearly 1st-order, making this a quite comfortable solution. (Dynamics are further improved in charge-compensated methods.)
For high-Q applications, like wireless power transfer or induction heating, the peaking can be quite severe, either forcing extremely slow (worst case) compensation, or some kind of custom dependent-parameter (non-LTI, adaptive/self-calibrating, or nonlinear) controller.