In forward bias, the p-type is connected with the positive terminal and the n-type is connected with the negative terminal.
The junction that I'm observing is the source-substrate junction. The source is the n-type semiconductor and the substrate is the p-type semiconductor. In this case, \$V_{GS}\$ has the positive terminal to the gate and the negative terminal to the source.
So my doubt is about the negative terminal of \$V_{GS}\$ because it is connected at the same time with the source and the substrate, so they shouldn't have the same voltage?
So how does \$V_{GS}\$ forward bias the source-substrate junction?
EDIT Whit source-gate junction I was meaning the n-p junction (source-substrate) under the Oxide.
I do not understand how the p-type substrate is connected with the positive terminal of \$V_{GS}\$. From the image, the substrate is connected with the negative terminal I mean.