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I asked on a forum some time ago about why my logical AND operation doesn't work and I received this diagram:

enter image description here

I don't use resistors, I use potentiometers to lower the voltage and I tried to adapt this diagram for potentiometers(wired with only 2 legs). Would this work in real life?: enter image description here

EDIT: I'm asking if the second diagram would work in real life, an AND operation made with potentiometers in place of standard resistors.

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  • \$\begingroup\$ Please clarify your specific problem or provide additional details to highlight exactly what you need. As it's currently written, it's hard to tell exactly what you're asking. \$\endgroup\$
    – Community Bot
    Oct 25, 2021 at 16:50
  • \$\begingroup\$ As currently shown you are using a three terminal device as a rheostat not a potentiometer . \$\endgroup\$
    – crasic
    Oct 25, 2021 at 17:00
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    \$\begingroup\$ if you close S2, the LED will light regardless of S1. Not an And operation... \$\endgroup\$
    – tobalt
    Oct 25, 2021 at 17:05
  • \$\begingroup\$ why don't you replace the transistors with the two switches? \$\endgroup\$
    – jsotola
    Oct 25, 2021 at 17:39
  • \$\begingroup\$ Because I want to be able tocontroll the and with electricity \$\endgroup\$
    – Bogdan
    Oct 25, 2021 at 18:00

3 Answers 3

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Logical AND operation using transistors

The problem is that the original forum post you received does NOT work as an AND gate for the LED.

Since there are no base current limiting resistors, SW2 can turn on the LED with all the LED current flowing through the BE junction. SW1 does nothing.

If you want an AND function use something like this:

schematic

simulate this circuit – Schematic created using CircuitLab

R4 and R5 are optional, their only purpose is to handle the CB leakage.

DO NOT use potentiometers in the manner you show in your schematic, turning the pot to one end results in very low resistance and very high currents. Buy some resistors.

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Not very well. Even if just S2 is closed, current can flow through the lower transistor's base emitter junction and light the LED. If the transistor isn't designed to handle the resulting base current, it could blow the transistor

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  • \$\begingroup\$ What can I do to make it a proper AND? \$\endgroup\$
    – Bogdan
    Oct 25, 2021 at 17:08
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    \$\begingroup\$ "blow the transistor" Don't think so. The upper transistor is acting as an emitter follower, and should be safe. The lower transistor might be stressed a little bit if it is on and the upper transistor is off, but it is characterized for up to 50 mA of base current; all of the LED current could go through the base without harm. \$\endgroup\$
    – AnalogKid
    Oct 25, 2021 at 17:13
  • \$\begingroup\$ @AnalogKid I'm not assuming the 2N2222 notations are accurate. \$\endgroup\$
    – The Photon
    Oct 25, 2021 at 17:35
  • \$\begingroup\$ @Transistor "NOR followed by inverter". NOR isn't an inverted OR? If I invert the nor isn't that cancel the first inversion created an OR? \$\endgroup\$
    – Bogdan
    Oct 25, 2021 at 17:35
  • \$\begingroup\$ @Bogdan, no, a NOR usually requires fewer transistors than an OR. An OR is an inverted NOR. \$\endgroup\$
    – The Photon
    Oct 25, 2021 at 17:48
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I'm asking if the second diagram would work in real life, an AND operation made with potentiometers in place of standard resistors.

The potentiometers on the transistor base-emitter junctions are doing nothing.


NAND gates are very simple to make and since they have only one stage they have a short propagation delay (the delay between input changing state and the output changing state).

schematic

simulate this circuit – Schematic created using CircuitLab

Figure 1. An AND gate built with discrete transistors.

Table 1. Truth table.

A  B  NAND  Inverted NAND
0  0   1         0
1  0   1         0
0  1   1         0
1  1   0         1

enter image description here

Figure 3. A CMOS AND gate. Why are NAND gates used to make AND gates in computers?

The AND gate of Figure 1 is not very good as the pull-ups are done using resistors and these would be slow in charging up the gate capacitance of the inputs it was feeding. That would limit the maximum speed of the logic.

The design of Figure 3 uses transistors to pull low and to pull high. These will have much lower resistance than the resistors of Figure 1 and so will facilitate high speed logic.

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