I'm designing an audio signal frontend to take an electric guitar analog output and deliver it to an ADC channel on a microcontroller. The µC/ADC are 3.3V
devices (although there is a 5V
regulated voltage source available on its carrier board). The purpose of this frontend is to take the AC waveform coming out of the guitar, which has a P-P voltage dynamic range between a few dozen mV
and up to 1V
, offset the signal by 1.65V
(half the ADC range), amplify it up to the ADC's rails, and apply an antialiasing lowpass filter beyond 20kHz
.
I would prefer to use a low voltage, single supply, rail-to-rail amplifier that can directly run off the MCU's 3.3V
supply without me having to mess around with additional voltage clamp circuitry or even a dual supply which would require a charge pump. I want to use only components that I have on hand and not buy anything extra. The only single-supply 3.3V
amp that I have is the LT6200-10
(product page; datasheet). I have 2x units of this IC, enough to create one preamp and one active filter.
Before printing and assembling the PCB by hand, which always runs the risk of damaging components, I wanted to simulate the preamp portion to make reasonably sure that it will do what I want. Since the heart is an LT part, I begrudgingly used the awful LT-SPICE simulator to capture the schematic and run a transient simulation. Here are the results.
- [OK] The input waveform
V(in)
is a steady500 Hz
400mV
sine wave. - [OK] The bias voltage divider
V(divider)
emits a clean1.65V DC
. - ---> The noninverting input
V(ninv)
to the amp appears to be centered around~2.3V
rather than at the expected bias voltage of1.65V
. - ---> The output waveform
V(out)
is clipped at exactly3V
and bottoms out at around~1.1V
rather than near0V
.
At first I suspected that the -10
variant of the LT6200
, which, according to the datasheet, appears to be intended for gains of >10, may not be compensated for the low gain of this circuit. So, as a test, I replaced the LT6200-10
with the regular LT6200
and re-ran the simulation. However, I observed an identical graph.
I think the fact that V(ninv)
is offset 650mV
higher than expected is a huge giveaway. As another test, I disconnected the noninverting input and re-ran my simulation. I was struck by the fact that V(ninv)
now is perfectly centered around the bias voltage:
So it seems that the input to the amp – which is, presumably, at a very high impedance – nevertheless dramatically alters the incoming signal. My analog knowledge is pretty weak so I can't understand why this is happening. I know that an ideal amp will always attempt to keep the inverting and noninverting inputs at the same voltage, so this is a hint to me on what's going on, but I'm stuck in trying to do further circuit analysis. I've fiddled a bunch with various orders of magnitude for all of the surrounding passives but nothing seems to cause a trend towards my intended behavior.
What am I missing? Is my topology wrong, or maybe one of the component values? I'm equally interested in filling the gaps in my theory knowledge as I am in a practical solution to this problem so that I can actually build the circuit.
Thanks for any help!
R6
as part of my experimentation and, while bringing it down does reduce theV(inv)
offset somewhat, the input signal now starts to leak into and affect the bias voltage. I can reduce R8 and R9 to compensate but all of this causes the system gain to be quite low. Reducing R3 to try to increase gain doesn't do much.... I feel like I'm trying to play whack-a-mole. \$\endgroup\$