I'm working the INA219 and reading it's datasheet and I have a doubt. I'm working with 1 sample of 12 bits (no oversampling).

The shunt voltage register has 15 bits plus sign when the PGA is configured in its /8 mode as shown in figure 20 (page 21). I'm only sampling 12 bits, where do those 3 extra bits come from? If I were using oversampling I understand it because it's the result of the average of the samples, however... I'm not! and I'm reading values in those lower 3 bits different than 0s.

In page 20 it says:

Shunt Voltage register bits are shifted according to the PGA setting selected [...]

So if I understand it, with the configuration I'm using, that register should be:

Shunt Voltage Register
| 15 | 14 | 13 | 12 | 11 | 10 |  9 |  8 |  7 |  6 |  5 |  4 |  3 |  2 |  1 |  0 |
|sign|                         ADC                               |  ? |  ? |  ? |

Where do the ? 3 bits come from wihtout oversampling?

  • \$\begingroup\$ What do you mean you're only sampling 12 bits? It looks to me like this is a 15-bit device in the /8 mode. ENOB is likely a few bits less, though. I don't see anything in the datasheet suggesting that it's a 12-bit ADC, at least. \$\endgroup\$
    – Hearth
    Oct 31, 2021 at 23:26
  • \$\begingroup\$ I configure the device to sample 12 bits, table 5 page 20. \$\endgroup\$
    – Zheoni
    Oct 31, 2021 at 23:58
  • \$\begingroup\$ @Hearth It's a 500 Khz delta-sigmal ADC, with typical 12 bit mode. \$\endgroup\$
    – Jeroen3
    Nov 1, 2021 at 7:24

1 Answer 1


I don't think you are reading the raw ADC output when you read this register.

It looks like the units for the shunt register value are millivolts rather than simply the raw bits of the ADC output value, with a resolution of 0.01 mV. The raw value read by the ADC is converted to the equivalent voltage and that is what you read from this register.

This is covered pretty well in section of the datasheet.

  • \$\begingroup\$ Ok, I understand that. I got confused and probably you are correct on that the ADC output is converted. But then when you go from the configuration in figure 23 and in figure 20, those bits come from a need to store a larger value because we are using a *8 scaling factor of the ADC raw value? And the consecuence would be a less accurate reading? \$\endgroup\$
    – Zheoni
    Oct 31, 2021 at 23:50
  • 1
    \$\begingroup\$ Not necessarily. Suppose the equivalent voltage of the LSB of the ADC is something like 3.3V/2048 = 1.611328 mV. When you convert the ADC output to voltage you need a lot more bits to express that result in millivolts (with a resolution of 0.01 mV). \$\endgroup\$ Nov 1, 2021 at 0:40
  • \$\begingroup\$ I now get why I need more bits as I divide the input voltage (PGA), but some accuracy has to be lost. If the ADC uses 12 bits for both the +-40mV range and the +-320mV range, the second one has to be less accurate, right? \$\endgroup\$
    – Zheoni
    Nov 1, 2021 at 1:18

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.