What's the use of a decoupling capacitor near a reservoir capacitor?

Question

I've seen some circuits where a decoupling capacitor is used as well as a reservoir capacitor, like this (C4 and C5):

I've read about decoupling capacitors and for me it looks as if they are meant to remove small fluctuations in the supply voltage. Then I thought - wasn't that the purpose of a reservoir capacitor as well? Why wouldn't the reservoir capacitor be able to filter out the small fluctuations, if it is able to filter out the large fluctuations?

So I feel like I have a basic misunderstanding here. What is the purpose of a decoupling capacitor next to a reservoir capacitor, when we assume we place both equally near to the power consuming part? Or is the only advantage of the decoupling capacitor that it is smaller and can therefore be easily placed more near to the power consuming part?

Answer 1

The most likely reason why that is done is because, in real life, capacitors do not have infinite bandwidth. Generally, the higher the capacitance of the capacitor, the less it will be able to react to high frequencies, while small-valued capacitors react better to higher frequencies, as seen in the graph below. Using two different-valued capacitors together is just done to improve the response of the filtering.

Answer 2

As you say, a decoupling cap and a power supply bulk reservoir cap serve two different purposes. You are correct in that the decoupling cap needs to be physically close to the consumer of the power it is decoupling. The bulk cap can be anywhere on the power net since it deals with low frequency currents.

However, the incorrect assumption you are making is assuming schematic placement implies physical placement. It doesn't. In a good schematic, there will be some hint to physical placement. In this case we can't tell if if the decoupling capacitor (C5) is physically near IC1 (where it should be) or not.

Personally I wouldn't draw a schematic this way for exactly this reason, and I think doing so is irresponsible. However, the schematic capture software will generate the same net list either way, so the details are really up to placement. Without a board layout diagram, you simply can't tell. I usually draw the decoupling caps physically close to their parts to give a hint that this is what I intend and that I've thought about it. This is one issue I mention when talking about how to draw good schematics at https://electronics.stackexchange.com/a/28255/4512.

Unfortunately, there are a lot of badly drawn schematics out there.

Answer 3

When two or more decoupling capacitors of different values are used in parallel, it is necessary consider the parallel resonance that occours between the two networks.

Clayton Paul described this phenomena. Consider a parallel coupling of capacitors C1, C2, with different values and C1>>C2 with parasitic L1 and L2 about the same L1=L2 (figure 1.A).

We suppose \$f_1\$ is the frequency where the capacitor C1 is resonant with inductor L1, and \$f_2\$ the frequency where capacitor C2 is resonant with inductor L2.

Below the frequency \$f_1\$ both networks look capacitive, and the total capacitance is equal to the sum of the two capacitors. This improves (very little) the decoupling at the frequencies below \$f_1\$.

Above \$f_2\$, both networks look inductive and the total inductance is equal to the two inductors in parallel, or one half the inductance. This improves the decoupling at frequencies above \$f_2\$.

At a frequency between the resonances of the two networks (\$f_1 < f < f_2\$), the equivalent circuit of the two networks is a capacitor in parallel with an inductor, as shown in figure 1.b (parallel resonant circuit). This produces a resonance (figure 2), which becomes a problem when the tolerance of components are over 50%.

Therefore, we can conclude that the decoupling will be improved at frequencies above (and under) the frequency at which both capacitor networks are resonant.
The decoupling will actually be worse at some frequencies between these two resonance frequencies, because of the impedance spike caused by the parallel resonant network, which is bad.

Answer 4

The main difference in small capacitors and large electrolytic capacitors is their frequency response. Electrolytic capacitors have poor specifications for higher frequencies and may eventually fail because of being stressed by the high frequency noise. In turn, high frequencies that the electrolytic capacitor only partially filters, may well be in the upper audible range of your amplifier.

The small capacitor easily filters the high frequency noise, but of course has little effect when it comes to low frequency mains power supply ripple filtering.

Answer 5

Not all capacitors are created equal... The larger bulk capacitors cannot respond as quickly due to ESR and ESL (Equivalent Series Resistance and Inductance) which is dependant upon their make-up.

There is of course the ability to get close like you mention, but in general a good scheme will have bulkier, slower and larger capacitances the further you get away from the circuit. the corresponding frequencies that need to be dealt with also drop, if done properly.

What limits the small decoupling capacitances is the self-resonance of the cap itself and the inductance of the bond wires in the package (again depending upon the package).

This scheme of hierarchical scaling continues inside the IC with critical nodes having local capacitors for higher frequency events. Of course these cap on the inside are the most expensive and smallest of all.