I come from analog/RF background and have limited knowledge in digital interfaces. According to TI's articles about Ethernet PHY found here and here, single MAC to single PHY connection seems very straight forward. You have xMII and MDIO/MDC connecting one MAC to one PHY.
Where I get confused is when an Ethernet switch IC comes into play. I have a circuit that uses 88E6320 as an Ethernet switch IC and has a block diagram like below (sorry, can't upload schematic and datasheet)
- Ports 3 and 4 are 10/100/1000 transceivers.
- Ports 2 and 6 are configured as RMII PHY mode using strapping resistors.
- Ports 0 and 1 are SGMII, connected to a soft fabric of FPGA w/ integrated MAC.
- Port 5 is configured as RGMII using strapping resistors, connected to a hard fabric of FPGA w/ integrated MAC.
What I don't understand is
- Isn't xMII used to connect PHY to MAC? How can ports 2 and 6, configured as PHY mode, still talk to external PHYs?
- Any reason to connect two PHYs back to back (like port 2 and 6 to external PHY) using xMII? Or in other words, why not set ports 2 and 6 in MAC mode if they are interfacing with external PHYs?
- Datasheet for the switch doesn't say anything about port 1 (SGMII) and port 5 (RGMII)'s MAC/PHY mode. How can I know which mode port 1 and 5 are operating in?