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I am designing a carrier board for the nVidia Xavier. While reviewing the documents for the MIPI interface, one of the requirements I don't understand is trace spacing: Xavier Design Guide

Does this mean that my traces must be at least 2x of the dielectric distance for anything else including the other differential pairs for the mipi interface? For example my impedance matching for a stripline is telling me I need a 14 mil distance between the top and bottom references, so if I take 1/2 of 14 mil and multiply it by 2X that’s 14 mil distance between any other traces surrounding my diff pairs?

My other question is some of the traces run close to a mounting hole. Hard to avoid with the current design. How far can I be from the mounting hole so that my reference plane does not look uninterrupted to the differential signal? I guess what I mean what is the min plane size above and below the signals I need? I have heard 4X trace width, but I am not sure.

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