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I have designed an amplitude modulation circuit for my school project. I realised that the amplitude modulation can be achieved by just adding a message signal at the emitter part to vary the gain of the amplifier.

The common emitter works fine since I just get a sample from YouTube first before starting changing the parameter.

After I add the information signal in it, the output is weird; when the signal reaches the positive peak value, the bottom doesn’t reach the negative peak value.

I want to design a simple DSBFC AM circuit with some amplification, that’s why I chose a transistorised modulator rather than a diode.

I have attached the image of the circuit and result below.

Circuit designed

Simulation result

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    \$\begingroup\$ the output signal is not amplitude modulated per se ... it is shifted with respect to local ground reference ... if you fed that signal to an RF transmitter, then the modulation would be invisible at the receiving end \$\endgroup\$
    – jsotola
    Commented Nov 15, 2021 at 1:26
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    \$\begingroup\$ There is probably a small amount of modulation in there but it is dwarfed by the feed through of the 10 Hz modulating signal. To see the modulation you need to high-pass the signal to remove the 10Hz signal on the output. Lookup "balanced modulator". \$\endgroup\$ Commented Nov 15, 2021 at 2:04
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    \$\begingroup\$ Incorrect configuration. That is 'no' AM signal. \$\endgroup\$
    – jay
    Commented Nov 15, 2021 at 2:25
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    \$\begingroup\$ Eddy, @KevinWhite has nailed the approach. There are two methods for DSB: either a square law modulator or else a switching AM modulator. Personally, since I have a few thousand of them, I'd just use an MC1496. It's faster than you need yet it works fine with low frequencies. Here's an example case simulation, though I used smaller caps (higher modulation frequencies here) and used 1 kHz to modulate 10 MHz. Still, it gets one point across: what it should look like. \$\endgroup\$
    – jonk
    Commented Nov 15, 2021 at 2:26
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    \$\begingroup\$ @EddyMiner Many ideas. But I don't know your constraints. If it is nothing more than "you can explain it" then you will have to spend a lot of time telling me about what you can explain and what you cannot explain. A carrier, fed to a variable voltage gain amplifier, gets you there if you can take the absolute value of your input AC. Forget the absolute value part of this. How would you construct a VGA from a BJT stage? \$\endgroup\$
    – jonk
    Commented Nov 15, 2021 at 4:29

3 Answers 3

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Amplitude modulation with one transistor can be done but difficult in resistive circuits.

Adding one more transistor allows the modulating current (in this case, 10 Hz.) an alternate path - you can now approach 100% modulation. In the case shown below, both bases are biased at 2.0V. Their common emitters are a little more than 0.6V lower, near 1.37V.
The 10 Hz. modulating signal has average voltage of zero volts, and peak amplitude very close to 1.37V. At its positive peak, no voltage appears across the 1k resistor...both transistors have no emitter current.
When modulating signal goes to its negative peak (-1.37V), available current is +2.74 ma. This current would divide equally between each transistor (since their average base voltage is the same). However, the carrier signal applied to one base disturbs this balance causing modulation.
schematic AM modulator
The circuit shown is simplified by using many voltage sources. Base bias could be provided by resistive voltage dividers to produce the 2.0V base bias.
The modulating signal at the emitters could be provided by another transistor acting as a current source varying between 0 - 2.74 ma., raising the transistor count to three. Collector voltage of Q2 (V_out) contains both modulated carrier and the modulating low-frequency signal. The small coupling capacitor C1 reduces the amplitude of the modulating component, while passing full AM signal to R2 (waveform at R2 not shown):
collector waveform AM modulator
Jonk's solution doubles the transistor count to 6 in a fully-balanced expansion of this idea when he suggests a 1496/1596 chip. A NE612 is a simpler version that is internally biased, allowing both modulating signal and carrier signal to be AC coupled with capacitors.


Edit: A simple conceptual AM modulator uses a logic-controlled single-pole, double-throw switch. The carrier signal is a square-wave logic-compatible waveform controlling switch state. In the schematic shown below, a relay is used to control switch state (not practical for fast carrier switching).

For half the time, the switch connects one modulator source to the output, half the time connecting the other source to output. Be aware that both low-frequency sources are the same signal, exactly out-of-phase. Each V1, V2 modulator source must have a DC offset combined with the 10 Hz signal. The peak amplitude of the 10 Hz signal must never exceed DC offset magnitude, else modulation exceeds 100%.

A relay shouldn't be used to switch between sources. Logic-controlled analog FET switches (example:74HC4053) might be used.

schematic

simulate this circuit – Schematic created using CircuitLab
It is not clear in the waveform below that a switch type modulator generates a squarish carrier output containing many harmonics. So you end up with not only the desired AM signal at a carrier frequency of 1 kHz., but also spurious AM copies at 3 kHz, 5 kHz, 7 kHz...these should likely be filtered out to achieve a clean output at only 1kHz (plus its wanted nearby sidebands). digital AM modulator

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  • \$\begingroup\$ Nice explanation on this idea, but can I know how the value for the resistors are calculated? \$\endgroup\$
    – Eddy Miner
    Commented Nov 15, 2021 at 4:56
  • \$\begingroup\$ In this example, assume all 2.74 ma. is directed to Q2. For a +12V DC supply, collector can swing down to +2.0V base voltage - a swing of 10V. 10/2.74=3.65 k collector resistor (my 4.7k is a bit large). Am adding a conceptual circuit AM modulator using switches that should be easy to understand, although it is not entirely linear. \$\endgroup\$
    – glen_geek
    Commented Nov 15, 2021 at 14:13
  • \$\begingroup\$ Could you help me out if I want to design using 50MHz carrier signal? I will be very appreciate. From my understanding, R5 is a to produce some voltage drop and there is high pass filter at the right. One question at here, I calculated the cutoff frequency but it looks weird. How you determine the value of it, since I afraid my formula is wrong. I am using f = 1/(2piRC) \$\endgroup\$
    – Eddy Miner
    Commented Nov 16, 2021 at 7:24
  • \$\begingroup\$ For 50 MHz carrier you should use tuned LC circuits and abandon resistor collector loads...a rather different design. \$\endgroup\$
    – glen_geek
    Commented Nov 16, 2021 at 14:02
  • \$\begingroup\$ The LC should be tuned at 50MHz too? \$\endgroup\$
    – Eddy Miner
    Commented Nov 16, 2021 at 14:26
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How to fix when the amplitude modulated signal reaches the peak, the bottom follows too?

The reason the "bottom follows too" is that the output of your circuit contains both an AM signal and an amplified version of the modulating signal. You need to attenuate the modulating signal component of the output as much as possible, while only attenuating the AM component only a little.

C2 and R5 of your circuit form a high pass filter. To attenuate the modulating signal from the output, the cutoff frequency should be near the carrier frequency.

I have change the values of R2 and R3 accordingly.

schematic

simulate this circuit – Schematic created using CircuitLab

A second problem that I encountered with the circuit is that the gain was too high, leading to clipping. The signal at the collector of Q1 needs to look something like this:

enter image description here

However, instead of looking like that, it was clipped at Vcc and 0.7V. That is, the transistor I used went into saturation and cutoff. This caused significant distortion in the output.

So, I reduced the gain by doubling R1.

I also increased the capacitance of C3 so that the frequency of the R1 * C3 pair was closer to that of the modulating frequency. This allows more of the carrier signal to bypass R1.

(The signal voltages were also tuned).

With these changes, the output looks like this:

enter image description here

Not perfect, because it still contains a noticeable component of amplified modulating signal. That can be seen by the fact that the output is still a bit asymmetric about the 0V axis. But it is much closer to a proper AM signal. A second filter stage would improve the output more.

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  • \$\begingroup\$ I managed to get the same result using CircuitLab but something wrong with multisim until I can't get the same result. Btw thanks for your clarification. \$\endgroup\$
    – Eddy Miner
    Commented Nov 15, 2021 at 4:50
  • \$\begingroup\$ I removed the clipping by increasing R1 to 2K. I also increased C3 to bypass more of the carrier. The results are in the edited answer. \$\endgroup\$ Commented Nov 16, 2021 at 3:30
  • \$\begingroup\$ It works fine, now I try am trying to tune it to other parameters since my prof wants a 50MHz input. Btw thanks for your idea. \$\endgroup\$
    – Eddy Miner
    Commented Nov 16, 2021 at 4:34
  • \$\begingroup\$ To thank me, you may upvote my answer and/or accept it. \$\endgroup\$ Commented Nov 16, 2021 at 4:35
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Look here how it should look like:

AM

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  • \$\begingroup\$ I understand this and that's make me confused on which part do I make mistakes. \$\endgroup\$
    – Eddy Miner
    Commented Nov 15, 2021 at 3:21
  • \$\begingroup\$ @EddyMiner part of the problem is that R5 and C2 should form a high pass filter with the cutoff frequency close to the carrier frequency. This will eliminate much (but not all) of the modulating frequency from the output. \$\endgroup\$ Commented Nov 15, 2021 at 3:49
  • \$\begingroup\$ @MathKeepsMeBusy someone provided an answer for this, yet the modulation is still not perfect. \$\endgroup\$
    – Eddy Miner
    Commented Nov 15, 2021 at 4:32

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