I am trying to understand the following part of schematic that is provided for KAI-4011/KAI-4021 Imager Evaluation Board: Horizontal driver It is explained by a following description: "The pixel rate CCD clock drivers utilize two fast switching transistors that are designed to translate TTL-level input clock signals to the voltage levels required by the CCD."

Almost the same schematic is also used at one other souce: Design of Driving Platform for Ultra-High Resolution CCD enter image description here

While I seem to understand the way this circuit works and successfully simulate it in LTspice I am not quite certain how Schottky diodes and both transistors were chosen. What are the key characteristics that these components have to have in order to work in this circuit? Replacing both transistors for DMB2227A (NPN+PNP pair) in the simulation seems to stop the circuit from working - output voltage is not swaying from -5V to 0V as intended (20MHz or 40MHz 3v3 signal input). This is also true when replacing diodes with RB168L.

Could you please explain to me the reason for choosing these particular parts and how can I potentially find a suitable replacement for them?

  • \$\begingroup\$ Post the LTSpice model, possibly in a way to directly import. Not sure that signal shall be 0 to 5V, there is no mention about the potential of HIL_HIGH and HIL_LOW, but I doubt it is 0V (low). \$\endgroup\$ Nov 16, 2021 at 21:39
  • \$\begingroup\$ @MarkoBuršič link \$\endgroup\$ Nov 17, 2021 at 6:50
  • \$\begingroup\$ @MarkoBuršič H_HIGH is 0V and H_LOW is -5V in the simulation. \$\endgroup\$ Nov 17, 2021 at 6:52
  • \$\begingroup\$ @MarkoBuršič it seems that spice model published at Diodes contains a typo. Both Transistors are specified as NPN type. After changing one component to PNP simulation proceeds as desired. My question however remains - what are the key characteristics of diodes and transistors that make them usable in this circuit? \$\endgroup\$ Nov 18, 2021 at 8:01

1 Answer 1


When the transistor is in saturation, its base accumulates minority carriers. For the transistor to return from saturation to cutoff mode, these excess carriers has to be removed from the base, and it takes the time, which is the storage time specified in datasheets.

From the point of view of the smallest storage time, the technology is beneficial for npn transistors. So we need only compare this parameter among pnp transistors. Take, for example, a general-purpose 2N3906. Its current gain-bandwidth product features 250 MHz, even better than the current gain-bandwidth product (200 MHz) of the pnp transistor of the DMB2227A complementary pair. But the current gain-bandwidth product is the small signal characteristic and can be used to characterize the switching rate only indirectly. The parameters directly characterizing the switching speed are delay time, rise time, storage time, and fall time. The pnp transistor of DMB2227A pair features a 80 ns storage time, whereas 2N3906, much longer 225 ns.

You can easily see in simulation how the storage time limits the pulse train frequency enabling a full-swing output of your driver. Use 2N3906 for Q1 and 2N3904 for Q2, and you can provide a full-swing output only with 10 MHz square wave at input. Use the DMB2227A pair, and you can increase the input pulse train frequency up to 25 MHz and still have the full-swing output.

In Schottky diodes, the limiting factor is reverse recovery time.

  • \$\begingroup\$ Would you by any chance know a good replacement PNP for MMBT3640 which has storage time of 20ns? Is there any reason not to use a MOSFET like IRF7309 for application like horizontal clock driver for CCD? It seems that mosfets are commonly used for vertical drivers. \$\endgroup\$ Nov 18, 2021 at 18:01

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