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I'm a little confused, can someone explain to me why this circuit conducts?

I thought that the body diode of the PMOS was in reverse polarity and the source node of PMOS should be at 0V, but simulation shows the opposite.

This is a reverse polarity protection circuit and normally it would be supplied from the source node, but I want to know why in this configuration the circuit behaves like this.

enter image description here

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The diode will be in reverse, but the FET is labeled wrong.

You are feeding the 10V to source and pulling the gate low, so FET is on.

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  • \$\begingroup\$ OMG, i'm so blind, thx \$\endgroup\$
    – giusepe
    Nov 22 '21 at 10:03

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