# Discharging RLC. Kirchhoff's second law

I have been trying to solve this homework problem for who-knows how many hours. I could break it down enough as to specify the problem I'm facing into a single question:

For the following circuit with a charged capacitor, is $v_C + v_R + v_L = 0$ the right term? Or should it be $-v_C + v_R + v_L = 0$? Why? I am getting really confused because everywhere, the RLC circuit is solved with a tension source, hence the formula is $E = v_C + v_R + v_L$, but I have doubts if it's as simple as E = 0 since in this particular case the source itself of the power is the capacitor, entering the current through the negative side.

Keep reading only if you said the $v_C$ should be negative. I explain how I tried this and didn't work at all about what I've tried in the problem and how I got to that particular question:

Here is the general circuit. The DC source charges the capacitor and in t=0 it's opened. Therefore, for all t>0, we get the simplified circuit of the previous image. The problem considering the $v_C$ negative is in the general solution of the differential equation:  From this solution, we can see that the current would increase non-stop, which doesn't make any sense (from the initial conditions $C_1 \neq 0$ and $C_2 \neq 0$). Therefore, using the right signs yelds to a wrong solution, using all v positive yelds to a good solution (both exponents negative).

Label Vc and Vl in your diagram... current always flows from higher potential to lower potential (voltage). So depending on the direction your draw your current flowing, the voltage always drops in the direction of that current flow.

Simply put, in your first picture there is only one current loop. The current flowing through all the elements must be equal. I'll call the upper left corner node Vc and the upper right corner node Vl. Then namely:

(Vc - 0) / Zc = (Vl - Vc) / R = (0 - Vl) / Zl


Here Zc and Zl are the complex impedance of the capacitor and inductor respectively.

Alternatively, if we assume a current i0 is flowing through the circuit clockwise, and remember that voltage always drops across an element when current flows through it, then:

Vc = 0 - i0 * Zc
Vl = Vc - i0 * R
0 = Vl - i0 * Zl


Therefore:

0 = Vc - i0 * R - i0 * Zl = - i0 * Zc - i0 * R - i0 * Zl


Changing the sign:

i0 * Zc + i0 * R + i0 * Zl = 0


So yes, all elements should have the + sign.

• In Spanish it'd be clear that Vc is the voltage drop in the capacitor and the Vl the voltage drop in the inductior... sorry for not labeling though. And thanks for the answer, I edited it and now I have it completely clear. Mar 4 '13 at 17:02
• @FrankPresenciaFandos, in English, we also talk about the "drop" of the voltage, but the direction could be for current going clockwise or counterclockwise through your circuit. Until you mark on your schematic which end of each component you consider the "positive" terminal, it's ambiguous which convention is intended. Mar 4 '13 at 17:20

You have to visualize the circuit properly as an abstract network (graph) consisting of nodes and edges. The edges go through components and the nodes are where components join.

Imagine a capacitor connected to a battery: a two component circuit. That circuit has two nodes: node N0 where the - terminal of the battery meets with a terminal of the capacitor, and node N1 where the + terminal of the battery meets the other terminal of the capacitor. We would usually identify some particular node, like N0, as a special node through which currents return and from which we measure voltage.

Now would you say that $V_B - V_C$ or would you say that $V_B = -V_C$? Of course when we are reading the schematic, we equate the two voltages! Both components are connected between exactly the same two nodes: from N0, to N1. It is because the two are equal that no current flows: we have equi librium.

But in order to apply the voltage and current laws, we have to follow complete circuits through the network. The voltage law does not work in terms of $V_B$ or $V_C$ but rather in terms of the nodes. As we go around the circuit, starting and ending on the same note, we arrive at the same potential: we do not lose or gain any net energy. This is because the electric field is a conservative field. Suppose we are positive electric charge starting our trip at N0. In moving from N0 to N1 across the battery, we gain potential. Then returning across the capacitor from N1 to N0, we lose the same amount of potential. Net potential gain: zero.

If you climb over a mountain's east side and come back down the west side to the same elevation, you do not say that the mountain has a negative height on the western side! The mountain is just as tall from the eastern basecamp as as it is from the western one. What is negative is your change in gravitational potential along the path which goes up and then down.

Note that if you reverse the path through the circuit, then the capacitor is regarded as being positive. But there is no preferred path. There is no reason to evaluate the path integral of the electric field in one direction versus the other. It works for all circuits in the network, regardless of their orientation. You can work the voltage law with the current (if there is any) or against the current. It doesn't matter. In the circuit in which a battery is connected to a capacitor (and has been for a long time), no current flows. You can trace the circuit up the capacitor and down the battery, or up the battery and down the capacitor.

If there are three nodes in the circuit, and we traverse it N0 -> N1 -> N2 -> N0, then the voltage law tells us that (N1 - N0) + (N2 - N1) + (N0 - N2) = 0. And in fact, the left formula in this equation works out to be zero, algebraically! That's really what the law is about: it is connected to electric potential being a conservative field, and therefore behaving like an algebraic field which lets us calculate easily with voltages.

The current law is also expressed in terms of nodes and is even simpler, because it applies entirely locally: the total of the currents flowing into and out of every node is zero.