Design of a three-phase grid inverter

I'm trying to design a three-phase inverter that takes +325V/0V/-325V input rails and converts it to three-phase, 230Vrms, 50Hz pure sinewave AC. At a power of a few kW per phase.

I don't think this really matters, but the application is a domestic off-grid inverter, so the phase loads won't be balanced and most loads will be connected between neutral and 1 of 3 phases.

My first idea was to use 3 of these 'half-bridges', that I now learned aren't really half-bridges.

I was expecting an output like this (waveforms from different circuit):

But actually got this: Red: before LC filter; Green: after LC filter

I now understand that that awful waveform is the result of huge voltage spikes caused by the inductor (since the output doesn't get pulled to 0V) that are being clamped to +200V and -200V by the MOSFET diodes.

What is a solution to this problem that uses a minimal amount of MOSFETs (for minimal cost, losses, and number of gate-drivers)?

Note: The simulation uses 2*200V sources instead of 2*325V since the MOSFET models used have a max Vds of 650V and I wanted to stay well below that at 400V. I haven't a found convergence-friendly model for a higher voltage MOSFET, so the plan is to test it at lower voltage and run one slow simulation with the actual MOSFET at the end.

Note 2: I asked about this in a previous question and Andy proposed using a single supply and an H-bridge. That solved the issue, but I'm now looking for a solution that works with 3 phases. Just adding this for completeness.

• Is there any load on the circuit? Also you are "reinventing the wheel"... do you have a purpose for doing so? Commented Dec 4, 2021 at 21:42
• @Harper-ReinstateMonica The 2nd waveforms are from the circuit I posted, so 32Ω load. I'm trying to build an inverter myself because it's much more fun and educational than buying one. I don't necessarily want to reinvent the wheel, I'm happy using existing plans to build the wheel myself. Commented Dec 4, 2021 at 22:00
• The upper and lower have to be switched complementary - i.e if one if ON the other is OFF with an additional dead time to prevent through conduction. At zero volts output, both transistors have 50% DT. It's not just that one does for positive or the negative half cycyle. Commented Dec 5, 2021 at 8:23
• As I recommended in your previous question, don't use Python and, instead, use the tool that you're already using for simulation. You will have the greatest control over your output, without the encumbrance of using PWL files. If I do that and I don't use the unipolar drive as you do (also suggested that it will have worse output that full drive), I get this result. The initial transient is due to not using uic. Since you're using LTspice, you should have the transistors in the database (click on the Vds[V] header to sort them by voltage). Commented Dec 5, 2021 at 9:04
• The half wave may be more efficient in terms of switching, and if that's your only goal then good luck. Commented Dec 5, 2021 at 9:05

I understand you want to design this as a three phase inverter, but it looks like your main question is how to make the output less distorted. So, from this perspective, as I mentioned in the comments, the output will be influenced by the control loop. For example, here is a basic half-bridge with a pure voltage mode loop, involving a simple PI filter:

V4 is the reference signal, G3, C2 form the loop filter, G4 is the equivalent of a resistive divider voltage feedback, E1 inverts the signal, A1, A2 are comparators for the SPWM, G1, R1, G2, R2 pose as drivers. Instead of V2, V3 you can have a single supply and split capacitors; about the same thing (except different grounding). Here, as it is it's a bit more convenient for the voltage feedback. There's no dead-time, I know.

I kept your values, but a few things to notice: the triangle has a DC that transforms it from bipolar to unipolar, the comparators will need to deal with the negative voltage swing at the input (even if the output will be from 0 to Vcc), and the compensation is done very lazily and without any concern for stability (which you will have if you want bandwidth). For this last reason, the output waveform (blue) is slightly triangular, because the bandwidth is quite reduced. You can see that the error voltage (black) compensates for the distortion. Without a loop you'd be getting the waveforms you have already seen. More bandwidth will get you better waveforms, but also get closer to instability.

For a three phase simply add two more legs (6 transistors in total). You should know that, in general, 3-phase inverters don't consider each phase in particular, but together, through the help of Clarke or Park transformations. This makes it easier to control the outputs, and also adds the possibility of having the inverter act as an active power filter (thus mitigating the imbalance). Also, for "a few kW" you may need to tone down the switching frequency, unless you're willing to spend more for GaN transistors (you'll be switching ~10 A at high voltage!). Not lastly, while the control could be made analogic (it has been done, with great care and maybe even stable results), the way to go is with a microcontroller.

Here is the code, save it as a file with the extension .asc:

Version 4
SHEET 1 1244 680
WIRE 1120 -96 736 -96
WIRE 736 -64 736 -96
WIRE 1120 -64 1120 -96
WIRE 624 16 560 16
WIRE 688 16 624 16
WIRE 0 32 -80 32
WIRE 112 32 48 32
WIRE 176 32 112 32
WIRE 208 32 176 32
WIRE 272 32 208 32
WIRE 384 32 272 32
WIRE 512 32 448 32
WIRE 0 48 0 32
WIRE 384 64 336 64
WIRE 624 96 560 96
WIRE 736 96 736 32
WIRE 736 96 624 96
WIRE 784 96 736 96
WIRE 896 96 864 96
WIRE 960 96 896 96
WIRE 992 96 960 96
WIRE 1120 96 1120 16
WIRE 1120 96 1072 96
WIRE 1152 96 1120 96
WIRE 1152 112 1152 96
WIRE 736 176 736 96
WIRE 1120 176 1120 96
WIRE 624 256 560 256
WIRE 688 256 624 256
WIRE 384 272 256 272
WIRE 512 272 448 272
WIRE 208 288 208 32
WIRE 336 304 336 64
WIRE 384 304 336 304
WIRE 624 336 560 336
WIRE 736 336 736 272
WIRE 736 336 624 336
WIRE 1120 336 1120 256
WIRE 1120 336 736 336
WIRE 336 368 336 304
WIRE 176 432 176 32
WIRE 960 496 960 96
WIRE 960 496 224 496
FLAG 336 448 0
FLAG -80 112 0
FLAG 512 80 0
FLAG 512 320 0
FLAG 1152 112 0
FLAG 896 160 0
FLAG 208 336 0
FLAG 256 352 0
FLAG 0 96 0
FLAG 48 112 0
FLAG 112 96 0
FLAG 224 448 0
FLAG 176 512 0
FLAG 272 32 err
SYMBOL voltage 336 352 R0
SYMATTR InstName V1
SYMATTR Value pulse 0 10 0 25u 25u 0 50u
SYMBOL Digital\\diffschmitt 384 -16 R0
WINDOW 3 -20 -9 Left 2
SYMATTR Value vt=0 vh=0 tau=25n tripdt=25n
SYMATTR InstName A1
SYMBOL nmos 688 -64 R0
SYMATTR InstName M1
SYMATTR Value STW11NM80
SYMBOL g 560 0 R0
WINDOW 0 0 3 Left 2
WINDOW 3 6 116 Left 2
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL res 608 0 R0
SYMATTR InstName R1
SYMATTR Value 12
SYMBOL nmos 688 176 R0
SYMATTR InstName M2
SYMATTR Value STW11NM80
SYMBOL g 560 240 R0
WINDOW 0 21 1 Left 2
WINDOW 3 27 112 Left 2
SYMATTR InstName G2
SYMATTR Value 1
SYMBOL res 608 240 R0
SYMATTR InstName R2
SYMATTR Value 12
SYMBOL voltage 1120 -80 R0
SYMATTR InstName V2
SYMATTR Value 300
SYMBOL voltage 1120 160 R0
SYMATTR InstName V3
SYMATTR Value 300
SYMBOL res 976 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 32
SYMBOL ind 768 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2m
SYMBOL cap 880 96 R0
SYMATTR InstName C1
SYMATTR Value 10u
SYMBOL voltage -80 16 R0
WINDOW 0 21 100 Left 2
WINDOW 3 -12 126 Left 2
SYMATTR InstName V4
SYMATTR Value sin 0 10 50
SYMBOL e 256 256 R0
WINDOW 0 37 29 Left 2
SYMATTR InstName E1
SYMATTR Value -1
SYMBOL g 48 16 R0
WINDOW 0 20 91 Left 2
WINDOW 3 29 119 Left 2
SYMATTR InstName G3
SYMATTR Value 1
SYMBOL cap 96 32 R0
WINDOW 0 26 17 Left 2
WINDOW 3 -35 -35 Left 2
SYMATTR InstName C2
SYMATTR Value 1m rser=10 rpar=1g
SYMBOL g 176 416 M0
SYMATTR InstName G4
SYMATTR Value 40m
SYMBOL Digital\\diffschmitt 384 224 R0
WINDOW 3 -20 -9 Left 2
SYMATTR Value vt=0 vh=0 tau=25n tripdt=25n
SYMATTR InstName A2
TEXT 400 -128 Left 2 !.tran 40m uic
TEXT 392 -96 Left 2 !.save v(err) i(r3)
• Thanks for the interesting answer. I was thinking of using a µC with something like an ADS131M03-3 which is a 3-channel ADC with +/-1.2V input and up to 64kHz sample rate for the feedback. Once I've built a prototype I'll start tinkering with the µC software and experiment with stuff like a variable switching frequency based on load, but those will probably prompt one or more future questions with screenshots from an actual oscilloscope rather than from LTspice :) Would you mind including the .asc? Commented Dec 5, 2021 at 20:32
• @Cecemel Sure, I've updated the answer. Commented Dec 5, 2021 at 23:31