Operational Amplifier - Level Shift Down and Scale Up

Question

I am trying to create a circuit that takes a 0.6V-4.8V input, and scales it to a 0V-5V output. I was thinking of using a rail to rail Op Amp, like this one (TLV9041 DCK SC70). I also used a guide put out by TI about designing and system with gain and offset, but when using the calculated resistor values, the output wasn't what I expected. LTSpice has an Opamp called UniversalOpamp2 which I was using to sim.

In the guide I used section 4 which details a system with a positive gain, (m), and negative offset, (b). I set the gain to be equal to 1.2, and the offset to -0.6. Below, I set Rf equal to 100 Ohms, and solved for the other values based on that.

With those values, this is the LTSpice model.

For clarity, the cyan wave represents the DC input of the signal I am trying to shift down. The input will be between 0.6V-4.8V. The green line is the 0.6V I am trying to shift down by. The pink line is the current output, which is just an upwards shift of the V- input.

I believe that since the input V+ signal is always larger than the reference signal, the Opamp will always be active. I can see the the wave of the output, however, I am getting saturated on the upper end and I believe its because the shift is not occurring. I'm sure there will need to be some fine tuning on the gain.

I was also trying to use this question as a reference. I also referred to this one, however, that one pulled up the voltage instead.

The basic premise of this is that a mechanical mechanism generates a signal that ranges between 0.6V and 4.2V, I want to run this through an ADC converter to send to an FPGA, with a signal between 0V and 5V.

**Original post had the Opamp flipped, updated post reflects the "correct" orientation.

Answer 1

1. Your +/- inputs were swapped.

2. Your resistor values are way too low for that (and most) op-amps

3. I think you want the Vref to be something other than 0.6V

4. In general this exercise is not something you should do- the op-amp is called Rail-to-rail but won't swing exactly to the rails especially when it is sinking the current from the offset network. Better to go directly into the ADC (buffer it 1:1 with that op-amp if you like). You only lose ~16% of resolution and gain in a number of ways. The manufacturer of the sensor intends it to be used directly with a 0-5V ADC.

5. If you still insist, note that the very ends of the input range won't be accurate (so don't use them for calibration) and also note that Rg1 is unnecessary, you can make Rg1/R1 higher and eliminate it. I'll do a sample calculation just for general interest but give it enough supply voltage it works well (which can cause other issues...)

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Just for fun, here is how you can calculate the values. You should not do this. You want an output voltage change of 5V for an input voltage change of 4.2V. That means a gain of 1.1905. Let's arbitrarily pick a feedback resistor of 100K (relatively high to minimize loading on the CMOS op-amp).

That means that R1||R2 = 100K/(1.1905-1) = 525K.

Now, we want an output voltage of Vout = 1.1905Vin - 0.6*1.1905 so it is zero with a 600mV input. That means that (theoretically) the output voltage would be -0.7143V with 0V in. That eliminates R2 from the equation for KCL and we can calculate R1 = 5V/7.143uA = 700K. Then R2 = 1/(1/525k - 1/700k) = 2.1M ohm.

^{simulate this circuit – Schematic created using CircuitLab}

Answer 2

I am trying to create a circuit that takes a 0.6V-4.8V input, and scales it to a 0V-5V output

and

I want to run this through an ADC converter to send to an FPGA, with a signal between 0V and 5V.

This answer is about convincing not to try and rescale the signal; it is good enough.

• If you rescaled the upper voltage to 5 volts, you need to ensure that your ADC can handle signals as high as 5 volts plus a couple of percent without clipping internally in the ADC. Most ADCs having a nominal range of 0 to 5 volts usually have at least 50 mV dead at the top due to conversion gain variations.

• It's the same at 0 volts - there will be a zero offset that can work against you and make your endeavours pointless and problematic.

So, your signal is absolutely fine as it is. If you tried to rescale a little bit then you need to realize that the tolerance on resistors is probably going to make things worse than the tiny loss of full-scale resolution that you think you need. If you need more resolution go for a higher bit-depth ADC and throw away the lower bits that you don't need.