I've seen many latching circuits through searching and reading some simple circuits. Most use NPN+PNP combination, some bistable ones use two NPNs, some use DPDT relays.

Is the following circuit going to work as a latch?

proposed latching circuit

The idea is that after the momentary switch is pressed , load is supplied through N-Mosfet as well as the NPN transistor(which will hold the N-Mosfet gate high until a reset occurs in power)

(Sorry, had to hand-draw as the circuit editor doesn't let me make a circuit on mobile phone)

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    \$\begingroup\$ You need to pull the gate to at least Vgsth+Vcc. Right now you just pull it to Vcc. Can’t you just cheat at do low side switching of your load? \$\endgroup\$
    – winny
    Dec 10, 2021 at 20:12
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    \$\begingroup\$ Also this won't even latch as you intend. \$\endgroup\$ Dec 10, 2021 at 20:13
  • \$\begingroup\$ @winny have access to NMOS and NPN only atm. \$\endgroup\$ Dec 10, 2021 at 20:49
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    \$\begingroup\$ Opposite. NMOS for low side switching. PMOS for high side switching. One of them where M2 is below the load. What is your load? \$\endgroup\$
    – winny
    Dec 11, 2021 at 10:49
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    \$\begingroup\$ Then do low side switching! \$\endgroup\$
    – winny
    Dec 11, 2021 at 11:20

1 Answer 1



simulate this circuit – Schematic created using CircuitLab

Positive Feedback with high side latch with Set,Reset and POR cap.

  • \$\begingroup\$ Thanks but that's PMOS and NPN combo. Is there any latch circuit like this (stable set and reset)that uses NMOS+NPN ? \$\endgroup\$ Dec 10, 2021 at 20:53
  • \$\begingroup\$ (no) I thought you read the comments that tells you need a supply higher than load to drive Vgs for NMOS. in Half-bridges it is routine to use low side PWM to diode cap Boost for high side Vgs for dual NMOS half -bridge. But if you want a low side switch, ok then its possible \$\endgroup\$ Dec 10, 2021 at 20:58
  • \$\begingroup\$ Is the circuit in my question going to work as a latch if the transistor collector is connected to Vcc+5V ? (VGSth of mosfet is 4V). and does the circuit need a capacitor (to suppress noise?) If so where? \$\endgroup\$ Dec 11, 2021 at 10:28
  • \$\begingroup\$ (no) You need to pull the gate to at least 2xVgs(th)+Vcc. Right now you just pull it to Vcc. i.e. Vgate needs to be say 5V higher than Vcc if Vgs(th) is 2.5V, so your design cannot even turn on except with large V drop across Vgs \$\endgroup\$ Dec 11, 2021 at 15:17

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