What values should be checked for SGMII signal compatibility?

Question

How can I verify the DC electrical compatibility of the SGMII signal between PHY and MAC (within FPGA)?

Here is the reference-design that I am working on. Page 40 is using a Marvel PHY that is obsolete. I would like to replace that PHY with TI 8386IS. My intention is to verify the requirement of voltage translators or resistor dividers in the SGMII line (Tx and Rx diff pair).

My basic understanding is, SGMII has standard DC specifications as shown in table 2 and 3 of this link. I am not sure how to process all this information to make a conclusion. Please advice. thank you.

Answer 1

There is no voltage translator nor resistor divider on SGMII lines per se but a thevenin termination and only on RX line. See page 16:

Without much information on the hardware design my guess is: Marvell 88E1111 has CML I/Os while FPGA I/Os are LVDS so there is a need for adaptation between these two electrical standards. There is no standard adaptation, you can look at different application note and schematics will vary and I'm not used to make adaptation so I can't answer you in detail about the choice for this specific Thevenin termination.

Regarding the other PHY, TI 8386IS, it seems to have LVDS I/Os, so for me you don't need adaptation. But the best thing is:

• Contact Intel about this Thevenin termination to get to know why they do it
• Contact TI about the PHY to verify if it has LVDS I/Os and if you need adaptation with the Intel FPGA.

If you have both LVDS I/Os you don't need adaptation, but you can still put the Thevenin termination resistors and not populate them.