Sizing a divider network for a buck regulator

Question

I am (re-)designing a buck regulator circuit, after having done the calculations the first time according to the manufacturer's datasheet.

My problem is that I should be seeing 3.3 V on the output, yet I am seeing about 4.5 - 5 V. I believe this comes from the fact that I sized my inductors and capacitors for fmin = 100 kHz, which is at the very limit of what the MC33063 can do. Hence my redesign of the circuit with an fmin around 50 kHz, and my wanting to know what other parameters have an influence on the output voltage.

I am using a MC33063ADR from TI and their datasheet is bare at best. Therefore I am relying on the datasheet from ON Semi and on this great application note to redo all my calculations.

My parameters are as follows:

• Vout = 3.3 V
• Vin = 24 V, Vin,min = 90% of 24 V so 21.6 V
• Iout = somewhere above 200 mA though the influence in my calculations is relatively limited
• fmin = 50 kHz
• Vripple = 0.1 Vpk-pk
• Vf = 0.6 V (catch diode forward voltage)
• Vsat = 1.5 V (the part's internal switch's saturation voltage)

All formulae seem pretty clear and are giving me results coherent with my first try, so I have decided to change a few parameters (e.g. I was trying to use the MC33063 with an fmin of 100 kHz, which I later understood was along the part's maximum rated frequency).

What did change is the way ON Semi calculates the resistor divider, compared to how I did it; I naively assumed that the current draw on the output voltage line was not important and used 5.6k and 3.3k for R2 (my R14) and R1 (my R15) respectively. ON Semi, on the other hand, assumes (application note, page 9 / step-down regulator example step 9) that "The divider current can go as low as 100 μA without affecting system performance."

Where does this value of 100 µA come from ?

I cannot seem to find that value anywhere in any datasheet of any of the MC33063 variants I've checked out, so I have no idea where that comes from. I understand it might not be essential to buck regulator design, but I would like to understand nonetheless, since they use that assumption to calculate their resistor divider network.

Edit : discussions below have clarified that, although the value of 100uA seems to spawn out of thin air, it does not affect the regulation enough to be of any actual importance, so it may simply be dismissed.

Answer 1

The input bias current of the comparator can be as much as -400nA. If the divider resistance is too high then the bias current will unduly affect the output voltage.

In your case you have about 2K equivalent resistance and 400nA will only affect the voltage by less than 1mV.

400nA/100uA is 0.4%, so the effect of the bias current using that rule of thumb for a minimum will be no more than 0.4% (less for higher voltages, but the resistor ratio will have more effect at higher output voltages).