7
\$\begingroup\$

The MPM3822C is a synchronous, step-down, power module with an integrated inductor.

enter image description here

According to the datasheet, the maximum output capacitance is 100uF:

MPM3822C electrical characteristics

Questions:

  • Why do they specify a maximum?
  • Would it be bad if I used two 100uF capacitors?
\$\endgroup\$
5
  • \$\begingroup\$ The maximum has to do with the stability of the feedback loop in the regulator. It is designed to be stable up to a certian output capacitance value only. If you use two 100 uF caps, that begaves the same as one 200 uF cap. So you would be exceeding the maximum and you risk instability. Also, explain why 100 uF is not enough for you. \$\endgroup\$ Dec 15, 2021 at 17:44
  • \$\begingroup\$ @Bimpelrekkie - This is powering a chip with a fairly narrow voltage window. We are currently getting some intermittent faults on the board, and I'm not sure where they're coming from. One thing I wanted to try was to reduce the power supply noise as much as possible, in case spikes were bringing the voltage out of spec for a moment and causing the faults. \$\endgroup\$ Dec 16, 2021 at 9:57
  • \$\begingroup\$ To determine if the power supply noise is the issue, here's what I would do. 1) Measure the current output DC voltage of this DCDC. Let's say it is 5.00 V. 2) Then connect a lab supply across the output of the DCDC so that the lab supply can power the load (instead of the DCDC). 3) Set the lab supply to a slightly higher voltage than the DCDC so in my example that would be 5.10 V. When you do that, the DCDC's feedback loop will see that the output voltage is high enough already so it will stop feeding the load. If that solves your problem then indeed supply ripple is the issue. \$\endgroup\$ Dec 16, 2021 at 11:23
  • \$\begingroup\$ @Bimpelrekkie that's an interesting technique, would you mind explaining why you couldn't just let the lab supply power the load at the same voltage, with the DCDC disabled (no input) or disconnected? Or are you assuming that doing so is not practical? \$\endgroup\$ Dec 22, 2021 at 2:52
  • \$\begingroup\$ why you couldn't just let the lab supply power the load at the same voltage, with the DCDC disabled If the DCDC can be disabled or removing the input voltage is OK (depends on DCDC) then sure, that can be done as well. But the method I suggest is easier to apply I think as no other changes are needed. \$\endgroup\$ Dec 22, 2021 at 11:02

2 Answers 2

14
\$\begingroup\$

For a detailed discussion, see this excellent TI application report but gross simplification: the regulator relies on a feedback loop of which the output capacitor is a part. Values that are too high or too low can lead to instability or undesirable transient response. Is there a reason you need extra output capacitance? If the transient response of the converter with 100uF isn't suitable, you may need to pick a different part.

\$\endgroup\$
1
  • 2
    \$\begingroup\$ However, depending on the load, it could very well be that 200 uF works. Although this would not be a good idea if the load current goes to zero. If you are testing this, be sure to test at temperature extremes, as stability margins can change. \$\endgroup\$
    – plasmo
    Dec 16, 2021 at 6:41
11
\$\begingroup\$

One reason is startup inrush current. If it's too high the regulator shuts down and can enter a cycle of repeatedly trying to starting up and shutting down. I think stability might be another one and is the more difficult of the two to address if it is the case.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.