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I am a beginner in digital electronics. I just completed combinational circuits and got introduced to sequential circuits.

I come to know that a cascaded NOT gate circuit as follows:

enter image description here

acts as a basic memory element.

There is clearly a difference in propagation delay between the two paths AB and CD.

That is, the signal will be delayed more in the path AB due to presence of two NOT gates unlike in the path CD.

I want to know if this different propagation delays for the two paths is necessary or plays an important role for it to act as a basic memory element?

If it is, then how?

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    \$\begingroup\$ Have you read: electronics.stackexchange.com/questions/309722/… ? As I mention there: it is not a proper memory cell. \$\endgroup\$
    – Bimpelrekkie
    Commented Dec 18, 2021 at 14:12
  • \$\begingroup\$ To make this a working circuit you need to ensure that the drive strength of the right inverter is much weaker than the strength of whatever is connected to the latch's D input (the input of the left inverter). \$\endgroup\$
    – Elliot Alderson
    Commented Dec 18, 2021 at 16:25

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Reset to default
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It is not a direct answer to your question, but reading this answer (mentioned in the comments) is an excellent way to understand what is necessary for this circuit to, sort of, work as a memory.

With that understood, you can take the next step to understand that the propagation delay is important to allow the storage. It determines how long the input signal must be strongly pulled to high or low for the output to be able to weakly sustain the input. The input can only turn to "floating" after this delay.

Note that an ideal circuit, with zero propagation delay, would also work, given the conditions presented in the linked answer. A direct answer would then be: propagation delay is not required for the circuit to work as a memory but if it exists, it must be taken into account for the effective storage.

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The difference in propagation delays is not necessary for this circuit to act as a memory. When the circuit stores a value (a 0 or a 1), it is in equilibrium - all nodes in the circuit have a fixed voltage on them and don't change anymore. This, however, means that there are no changes propagating through the circuit - therefore the propagation delay is irrelevant in the steady state.

The propagation delay only comes into play when you want to change the value that's being stored: You need to force the circuit into the new state at least as long as it takes the new state to propagate around the entire circuit once (the propagation delay of path A-B-D-C-A).

This applies to any memory element that's based on a combinatorial feedback loop, not just to this circuit in particular.

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  • \$\begingroup\$ Ok then, if I replace the two NOT Gates from path AB by a resistor and also put another same resistor in path BC,will it still act as a memory element then? \$\endgroup\$
    – It's probable
    Commented Dec 18, 2021 at 14:29
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    \$\begingroup\$ No, it won't. The circuit acts as a memory because the NOT gates are amplifiers and can replace any charge that's lost from the wires. Without an amplifying element, the charge (and therefore the stored value) will decay. This is also why DRAM needs to be refreshed periodically - it doesn't have a built-in amplifying element, causing the stored value to decay over time. \$\endgroup\$
    – Jonathan S.
    Commented Dec 18, 2021 at 14:35

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