What I am looking for is some open driver that tackles more than just 48 kHz.
Or a trick, if there is one.
PIN30 MCLK gets 24.576 MHz and I have internal counters to count down with, for the speed of the I2S.
\$\begingroup\$
\$\endgroup\$
3
-
\$\begingroup\$ Sample rate supported by each input interface: PCM:44.1KHz,48KHz,88.2KHz,96KHz,176.4KHz, 192KHz,352.8KHz,384KHz \$\endgroup\$– D.A.S.Commented Dec 18, 2021 at 22:20
-
\$\begingroup\$ Thanks! As far as I can see in the CS43L21 data sheet there are "sample rate (LRCK)" of 8 to 96 kHz in steps. But this is dependent on MCLK, which on this board is 24576000 Hz from a PLL that may be controlled, though. You indicate some higher steps. It would be great to have this seen in perspective. The circuit diagram is at xmos.ai/download/… \$\endgroup\$– Øyvind TeigCommented Dec 20, 2021 at 8:20
-
\$\begingroup\$ Sorry for the error in the heading! I'm talking about DAC all the time here, not ADC. I got the letters confused, I must admit. \$\endgroup\$– Øyvind TeigCommented Dec 28, 2021 at 19:56
Add a comment
|
1 Answer
\$\begingroup\$
\$\endgroup\$
2
As shown in the datasheet, the CS43L21 does not automatically support 8 kHz sampling rate with 24.576 MHz MCLK.
Either halve the MCLK output from the PLL, or enable MCLK dividing by 2 at the DAC in hardware or software, or disable auto-detection and set the MCLK to FS ratio manually.
-
\$\begingroup\$ Thanks! I think I have done what you state, but I'll fine read your comments and then come back here. Øyvind \$\endgroup\$ Commented Dec 30, 2021 at 10:50
-
\$\begingroup\$ Thanks, @Justme. I do think that should be in place. But in trying to understand what XMOS might have done, and what I have done, I have made a description of it all (PDF), and made my code available. This is just a hobby project with one of the purposes to be shared, with no ads or income from my notes. It's at link \$\endgroup\$ Commented Jan 6, 2022 at 10:37