# What frequency stability crystal do we need?

We're designing a simple digital clock and using a 32.768 kHz crystal with a frequency stability of 20 ppm (standard off-the-shelf SMT).

We're finding the clock is running fast by about 2.5 minutes per month.

Now we may have two issues here... we have tracks running under the crystal that might be making the PIC see extra pulses, and we've moved these on our next re-design. But I'm wondering if I should be using a better crystal?

According to the maths, a 20 ppm crystal could be 52 seconds per month out; if we went for a 5 ppm crystal this would be 13 seconds per month. I'm not trying to build an atomic timepiece here, but 52 seconds per month is a bit much, I'd prefer 13.

However 5 ppm crystals seem very hard to come by, most are 20.

Can I ask, what types of crystals do people use when building a normal time clock?

We have another option in the PIC where we can adjust the RTC calibration, but this means we have to read the actual frequency on each unit, not very practical in production!

So what should we be using? A 5 ppm crystal or a 20 ppm and manually adjust each one?

Here's a couple of images of the circuit diagram and layout

• Are you sure you're using the correct load capacitance for the crystal you've chosen, and taken parasitic PCB capacitance into account? Commented Dec 18, 2021 at 20:06
• Crystals have both initial tolerance and tolerance over temperature changes. Do you have temperature changes? Also the crystal needs to be running in the correct oscillator circuit to run at the rated frequency. The correct circuit includes correctly sized load capacitors. Please post the exact crystal model/order code you bought and schematics and PCB layout to find out any issues. 2.5 minutes in 30 days is about 58 ppm. Commented Dec 18, 2021 at 20:09
• You may also want to ponder on this, and possibly edit your title: "stability" is a measure of how much something stays put, while "accuracy" is a measure of how close something is to what you want. If your clock is exactly 52 seconds fast every 30 days, then it is dead stable -- but inaccurate. So your problem at the moment is not stability, but accuracy. Commented Dec 18, 2021 at 20:39
• If you need 15 seconds per month accuracy, then that is approximately 6 ppm. So yes, a 20 ppm crystal won't work without calibration. Also, which crystal oscillation mode you are using, the high power or low power? Commented Dec 18, 2021 at 20:45
• If you're just using this to keep time, is there a reason you're reinventing the (square) wheel here? Why not just use an RTC chip? Those already have things like temperature compensation, etc. A DS3231, for example, keeps time to +/-5 ppm out of the box. If you need low power something like the RV-3028-C7 is even better and it provides clock, calendar, and alarm features right in the package.
– J...
Commented Dec 19, 2021 at 15:18

Too long to read all that stuff so, here's the short story

From comments under the question, Trevor says this: -

we think the caps are correct. We have 2x 15pf to ground. The crystal we're using is this one

But, the part linked is a 6 pF device (that requires 2 x 12 pF tuning): -

So, you are probably using the incorrect loading capacitance and, below (the long-story) is how that might change things...

A bit of background stuff first

The crystal model below was made by looking at several off-the-shelf offerings of 10 MHz crystals and then forming an "average" equivalent circuit. Either side of the crystal are CL1 and CL2 (the loading capacitors). In series with the driven end (V1) of the circuit, is R1. All these components ensure that the crystal "sings" at the frequency written on the tin: -

The model values cause a series resonance of precisely 10,000,000.1403 Hz. But, a crystal can never be used at that exact frequency; it has to operate slightly "inductively" as per this diagram: -

Let's move on to frequency errors by looking at the AC response of the full simulation.

The plot shows some typical frequency changes when capacitive loading is altered in 5 pF steps: -

Important here is the frequency at which the phase change between Vin (the inverting logic gate's output) to Vout (the signal fed back to the inverting gate's input) is 180°. Because the gate is an inverter, you get oscillation when the phase change is precisely 180°.

With 2 x 20 pF loading, the oscillation frequency is 10.00137 MHz. If the loading changed to 2 x 15 pF, the oscillation frequency becomes 10.00165 MHz. That's a change of 280 Hz in 10 MHz and, is equivalent to 28 ppm.

Do you see the issue here?

Slight changes also occur due to the value of the driving resistor changing

It's a smaller effect than that seen by changes to the loading capacitor but, nevertheless, it's an effect that could be improved upon. Results above are with a 2 x 20 pF loading.

Gate propagation delays can cause changes

No matter how good the crystal is, or how carefully you have chosen the component values around it, if the inverter gate is a poor performer, you will get oscillation frequency errors and possibly excessive frequency drift. Consider the 74AC04 inverter: -

The propagation delay figures quoted for rising and falling edges are typically around 5 ns but could be as high as 10 ns. This means an overall output delay time of 10 ns and, considering that we are looking at a 10 MHz oscillator, 10 ns is equivalent to adding 36° of phase shift. This is alleviated by the type of circuit used; we are operating the gate in a semi-linear fashion and, deep saturation of the output MOSFETs would not happen but, something like 20° of equivalent phase shift might be expected.

This means that the loaded crystal circuit only has to produce a phase displacement of 160° in order to create oscillation: -

So, basically, if the gate that is used to turn the crystal into an oscillator is a little flaky and drifts, you get more errors. OK, this is less of a problem for a 32,768 kHz crystal than a 10 MHz crystal because gate delays represent a proportionally smaller error.

However, you still need to check that you aren't using something really crappy because, the error could be significant.

Pictures (and some text) taken from my crappy website.

Summary

• Get the crystal loading capacitance right - use good capacitors and ensure you understand what the gate's input capacitance and other parasitic capacitors are.
• Make sure you are using the correct value series resistor. For a 32,768 kHz crystal this is exceptionally vital (not just because it might give an error but because you could easily damage the crystal with too much power).
• Make sure you have a decent gate for the oscillator.

Can I ask, what types of crystals do people use when building a normal time clock?

And

So what should we be using? A 5ppm crystal or a 20ppm and manually adjust each one?

It sounds to me like you need to observe the above and note that you can tweak a crystal into more initial accuracy.

The mouser link to the crystal appears to say that the loading is 6 pF so ideally, that is formed by 2 x 12 pF capacitors and not 2 x 15 pF capacitors. Then, you should probably assume the gate input has 2 pF of capacitance and, that there may be 0.5 pF of parasitic capacitance across the device due to the PCB and its tracking.

All in all, it's looks like you may be over egging the loading capacitance and, quite possibly, you should be aiming for more like 2 x 10 pF and not 2 x 15 pF.

Double check your drive power too because with loading at 2 x 15 pF you might be putting too much power into your crystal (the drive level is quoted in the data is 1 μW maximum.

As an afterthought, if the device is predictably running different to true time, then, you could make a compensation in software. But, you need to be very certain about this so that it's not some long-time-based cyclic drift.

If you have a suitable means of measuring the frequency, you can adjust one of the load caps with a trimcap to get closer to the ideal. However you will need some means of measuring without altering the frequency (you certainly cannot just put a probe on the crystal pin).

Perhaps you can find a way to output a buffered and divided version of the clock, such as 8,192Hz. To adjust the frequency to a tolerance of 10 seconds per month you need 1 part in 260,000, so about 6 digits of resolution. A reciprocal frequency counter would work, or you could divide it by a further 8,192 (say) and measure the pulse width to a resolution of a microsecond or so. The first digital watches used LED display (push a button for the time) and there was a patent issued, if memory serves, for using the multiplex frequency of the LED display as an optical output for calibration (since it was derived by a hardware divider).

Alternatively (and probably the option I'd suggest) if you can stand a bit higher current draw (possibly) you can replace the crystal with an oscillator which is already trimmed to be accurate enough. If you search a distributor for 32.768kHz oscillators you can find several available TCXO (temperature compensated crystal oscillators) such as the 5uA SiT1566 with +/-3ppm or +/-5ppm stability. If you are willing to redesign to use a higher frequency oscillator and don't care about power consumption you can get very tight tolerance and low drift TXCO oscillators with accuracy and stability in the sub-1ppm range (without ovenizing) or better with ovenizing (OCXO). Naturally, the cost and power consumption tends to increase with increasing accuracy and stability, and at some point the miniature atomic clock modules enter the game, but they're in the $1K range. Chip-scale ones are even more impressive but get into the$5K range. Considering +/-3ppm cylindrical 32.768kHz crystals sell for 2-3 cents, that's 53dB cost range for perhaps a 5000:1 range of accuracy.

Those are overly expensive (£0.81 / 2k) Swiss 20 ppm Xtals. You can get a <=5ppm crystal Oscillator for not much more ($1.58us 3k). caps not needed. With more search effort you can get 1 or 2 ppm XO's for the same price. But your budget and tolerance specs are not clear. I previously overestimated your unusual error. It's high but not silly high. 2.5min/60m/24h/30d=error= 58 ppm. Your datasheet says there are several load options (6.0 7.0 9.0 10.0 12.5) I would not expect them to make them to each , but rather just test and sort into bins of frequency error vs load C and sell them this way... Lower C also reduces the driver current on an RTC and you can get integrated RTC with XO for an extra quid. I would perform a root cause sensitivity analysis and validate all assumptions like cap accuracy. But you might not. The sensitivity for reducing the frequency can be computed and simulated, while the caps do not need to be equal. I would start by adding 50 pF on the input, which raises the load to 12 pF with the output 15 pF in series. That ought to reduce the f by 30 to 60 ppm. Then measure the error and do a sample of Xtals(X) and compute the standard deviation and mean error to compute 3 sigma yield. Or use the Process Capability calculation "Cpk". It could be done rapidly on a test board. A ground plane adds EMI protection and a few pF. There may be a 5~10 ppm sensitivity to Vdd and series R if not added. • +1, a premade oscillator is a great solution that avoids most of the failure points in design and manufacturing. And that particular one looks to be pretty low power also. – jpa Commented Dec 19, 2021 at 9:11 Many "simple digital clocks" I see these days use the broadcast time signal to stay exactly accurate over longer durations. While this mandates some extra circuitry, it removes the need for an expensive oscillator. Alternatively, you could calibrate the frequency offset of each clock because stability is usually much better than initial accuracy ( see comment by @TimWescott ) but that's prohibitive for a mass produced piece. Many good reply on quartz already. I can see two others solutions: 1. Use external RTC with integrated crystal such as Maxim DS3231, Epson RX6110SA, and many others. Which is laser calibrated and had a very low power consumption. 2. Use a GPS receiver which give almost atomic clock accuracy as soon as you receive the GPS signal. GPS module tend to be small and cheap now but consumption is way higher i had long consideration of 1-2 ppm stability clock design. At least ended with use of an external TCXO building block available by cheap chinese (ROJO) and other (e.g.EPSON...) manufacturers. The only problems are powering 3.3~5VDC and injection of 32768Hz output to custom oscillator chip input. The worse thing of the TCXO is aging, which can reach another 1ppm/year absolute frequency shift of clock. But if no space restrictions (12x12mm or tiny SMD), powering problems (some uA/DCV) + cca$5-10 is acceptable, this is the best solition.