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I was not able to find an answer via web search. The question came to my head after reading https://www.networkworld.com/article/3049428/humidity-not-heat-is-a-hard-drives-biggest-threat.html:

The report notes that large data center operators today can report yearly Power Usage Effectiveness (PUE) of 1.1 to 1.2, meaning just 10% to 20% of energy goes into non-compute efforts, like cooling.

I thought: "90% of energy is spent on computing, where energy spent on computing goes?" From my understanding of physics, some to heat, some to change in potential energy of computing devices. For SSD, which use Flash memory, it means using e.g. "Charge trap" to store data.

  1. Which state of "charge trap" holds more potential energy?
  2. Quantitatively, how change in that energy level compares to energy dissipated as heat to change state of a trap?

P.S. I oversimplified I guess a bit, there are different technologies for flash, one cell can hold more than 2 states for some, still I hope to get a useful/interesting answer.

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  • \$\begingroup\$ why did you use the heat-protection tag? \$\endgroup\$
    – jsotola
    Dec 18, 2021 at 23:31
  • \$\begingroup\$ @jsotola, I thought if data are written in a way to minimize energy to heat it would protect the device. btw "There is no usage guidance for this tag … yet!" \$\endgroup\$ Dec 19, 2021 at 0:24
  • \$\begingroup\$ @jsotola, on a side note, one uses "aids-protection" to mean prevention of the decease, not cure, so heat-protection similarly means more to prevent heat, not remove it (IMO), so that way e.g heat-sinks would be not applicable for heat-protection tag, for overheating-protection yes. \$\endgroup\$ Dec 19, 2021 at 0:30
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    \$\begingroup\$ I think this question will get more traction over at the Physics Stack Exchange. By volume, memory constitutes the largest category of manufactured semiconductor products. It this question has not been asked, there should be reasons for it. This question deserves more discussion. \$\endgroup\$
    – Syed
    Dec 19, 2021 at 6:28

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There is a lot going on inside of an SSD aside from the actual NAND flash. So from an energy perspective, the amount that actually ends up inside of the floating gates during write operations is going to be absolutely miniscule. The transistors and their floating gates are optimized to be extremely small in order to increase the storage density, so small that adjacent cells actually interfere with each other, requiring the use of forward error correction, scrambling, and other pre-processing to "whiten" the data (in other words to make it look more like random data by ensuring an even mix of 1s and 0s and preventing long runs of 1s or 0s). I believe the parasitic capacitance of the bit lines is going to far exceed the capacitance of a single bit cell, so you're going to be expending far more energy charging up the bit line to the programming voltage during each write operation than you're going to store in the actual bit cell, by several orders of magnitude.

Edit: so far I have had no luck finding numbers for the capacitance of a single floating gate. However, I did find a paper with some numbers for the energy consumed while reading/writing a single page: https://cseweb.ucsd.edu/~swanson/papers/TransOnCAD2013.pdf (see table VII). Probably the most interesting number is the energy required to erase a page: 115.218 uJ for all 1, 115.229 for all 0. This is a difference of 11 nJ, for a page containing 2 KB or 16 Kb, which is around 670 fJ per bit. The main takeaway is that the energy required to program a page or read a page varies by many orders of magnitude more than the energy released during erase.

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