it seems there is a 200ohm resistor on each pin
I'll assume that means "in series". (check, please. If it's just parallel to ground, then this offers no protection.)
200 Ω: protects, a bit, but probably more because you'd want to have some termination on a high-speed line.
Would it survive connecting a low-output to 3.3V?
You'll need to read the FPGA's datasheet. The "maximum ratings"/ electrical characteristics will tell you how much current is OK to sink.
The worst-case current sunk into a low output through 200 Ω from a 3.3V input is (3.3 V - 0V) / 200Ω = 16.5 mA. That might well damage a more sensitive pin, but the FPGA's outputs that are used for the PMOD header might well be capable of withstanding that. Or they might not. Datasheet!
Honestly, if you're so worried, then simply don't make a mistake (this sounds ultra stupid, I know); design the interface to the PMOD once, carefully, build it without the FPGA in place, solder it together instead of keeping it on a solderless breadboard. Not like you need a lot of flexibility on that side of things: the whole point of FPGAs is that it's easy to reconfigure them, so you can externally define once "this is going to be low-speed input," and so on, and add protective measures as adequate.
And what about when the board is programed by the default (snake on display and colorful lights) code? This will get loaded after each powerup before programing with my code, are the Pmod pins inputs in this case? They seemed to me as tied low when tried to measure them.
Ah, that will be part of what's written in the data sheet. Possible, but unlikely, that things are pulled down strongly before reset. (unless your external 200Ω are actually pull-down resistors and not in series) Might be a weak internal pull-down. Anyway, pre-configured state is super important for FPGA applications, so definitely something that's well-documented.