# Transformer saturation when current is flowing

I have a nanocrystalline center-tapped transformer with 2 turns at the secondary and 17 turns at the primary. There are 4 windings at the secondary as each leg of the transformer is parallelized with 2 windings. It looks like this:

simulate this circuit – Schematic created using CircuitLab

Do not take into account the inductance value; it is wrong.

This transformer is inserted into a full-bridge forward converter.

My problem is the following:

When I apply a voltage across the primary and let open the secondary, which means that no current other than the magnetizing current can flow at the primary, the transformer does not saturate even at the maximum duty cycle. According to the formula:

$$B_{max} = \frac{V_{in}\cdot T_{on}}{N_p\cdot A_e}$$

Where Ton is the time during which the MOSFET is ON, Vin is the input voltage, Np is the number of turns at the primary, and Ae is the magnetic section.

According to the formula and what I have in theory, the transformer should not saturate.

Nevertheless, when I apply a current at the secondary, even very low as regards of the current section, I should say even for a very low current density as the current at the primary jumps to 5 A but it can go up to 75 A, the transformer is saturating. I hear a noise and I can see, using a current probe, that the current has a saturating waveform. But what is pretty strange is that it is saturating only on one side.

(I deactivated the voltage regulation of the controller in order to always have a full duty cycle as due to the saturation, the controller could stop the ON time before the maximum ON time, and it will have the tendency to reduce the problem. Nevertheless, it is not really safe to keep this problem and my equipement has already been destroyed during testing and I think it is coming from this problem.)

It probably means that when I apply a current, I am able to displace the average point on the BH-curve.

My converter looks like this :

And the BH curve is the following :

And what I think is happening but I do not know why:

I was thinking at the beginning my duty-cycle waveform was set without a soft start, I mean when I start to set Vin across the transformer during Ton and then I apply minus Vin during Ton I will displace my average point from the center to the corresponding exciting magnetic field H, so the duty cycle must increase gradually in order to let the avarage magnetic field go to 0 ideally.

I also tried to increase Vin with the secondary open, to see if I had some margin between the saturation and my operating point, and I do have some margin! I am not able to saturate it; I will damage my capacitors before saturating it, so there is really something happening when I am applying current.

If you have some ideas, please let me know.

• Show the precise waveform of the primary current plrase. Commented Dec 27, 2021 at 21:11
• You could try to insert a capacitor in series with the primary (a 1u, maybe greater value) that can sustain that kind of current. This was pretty standard in former PC suppies (I don't know the current ones). They were relatively bulky and were meant to avoid any possible DC current that might saturate the transformer (imbalance & co). Commented Dec 28, 2021 at 10:11
• Thanks a lot for the hand-drawn waveform! What's happening is (probably) this: Your FETs aren't exactly the same so one of them has higher resistance, meaning that under load, one half of the bi-polar PWM cycle is a few hundred microvolts(!) higher. The transformer mercilessly integrates this into a DC current until it saturates. As concerned citizen suggested, try a series capacitor. Though you'll need about 20 parallel 22µF 1206 X7R ceramics to handle this current. (1206 ceramic caps can typically handle about 4A each at high frequency). Also add a 0.5 Ohm resistor in parallel with the caps. Commented Dec 28, 2021 at 12:44
• It's not quite clear to me yet what you mean by "delaying the time". You will either need some kind of active DC bias suppression or a series capacitor. Take a look at this: mdpi.com/2079-9292/10/4/428/pdf Commented Dec 28, 2021 at 13:38
• With nothing on the primary to detect and maintain equal positive and negative Vt, you are left with series capacitor to block the DC offset. Commented Dec 28, 2021 at 18:29

Even if the signal generation is perfect (say from a low-jitter high-speed state machine), there are mismatched delays in the coupling and drive circuitry, and in the transistors themselves. The result is a small DC voltage output which varies over temperature, manufacture, and perhaps time.

The solution is simply a coupling capacitor.

Note that, give or take initial (startup) transients, and the implied startup of the DC offset itself, this capacitor will likely need some damping. Most likely it's fine to connect a resistor in parallel with it, $$\R = \sqrt{\frac{L}{C}}\$$ or thereabouts. L and C are the relevant inductance and capacitance; in this case, most likely primary magnetizing inductance, and the coupling capacitance.

For a nanocrystalline core with extremely high μr, you may find this is not enough, and an $$\R + C_s\$$ instead is required, to eliminate DC entirely. In this case, choose $$\C_s > 3 C\$$, and R as above. For ferrite cores, typically a lower μ is chosen -- power ferrites are typically 1000-3000 μr to begin with -- and a small airgap can be added to lower μeff further.

My most interesting experience with this, was an induction heater I designed custom for LANL, operating around 1kHz and 10kW. (No, I didn't sign any special paperwork concerning this; and yes, you are welcome to rub your nose in the direction of any number of interesting materials. Officially, we were only heating a susceptor; what they were putting inside it was... their business.)

Anyway, I determined the electrical requirements (one H-bridge inverter board, equipped with IGBTs, would do), and had custom-ordered a few impedance-matching transformers to use with them. These were of toroidal design, stripwound steel (GOSS, thinnest gauge). I wired it up for the first test, hit the "go" button, and -- sssSCREEEEE, the gentle hum of machine operation gave way to an intense high-pitch sound from the transformer. Coinciding with this, the inverter current waveform became extremely distorted (much as pictured above) -- core saturation.

Like you (perhaps?), I assumed the control (indeed, a high speed digital solution) had tight enough timing not to cause problems. Not a bad guess, but again, it's give or take a hundred ns or so in the drivers and transistors -- not much, but a little bit adds up over time in the transformer.

I added a coupling capacitor in series, and found it still saturated hard at first, as the startup transient settled (the settling transient was audibly apparent, i.e. a resonant frequency of some Hz; and none too pleasant electrically either, causing alternate saturation before it settled). Mind, the controller delivered an initial quarter-wave pulse -- the initial flux in the transformer was as perfectly balanced as was reasonable to construct; but over those initial dozens of cycles or so, there was apparently still plenty of offset to drive this transient. Well, when the winding resistance is small, and the core permeability high (read: saturation magnetization low), it doesn't take much (DC or LF) voltage at all to cause problems.

So, I slapped a resistor across the capacitor (having calculated the required value from primary inductance and the capacitance, of course), and it was well behaved thereafter. Whatever leakage flowed through the resistor, was not enough bias to cause saturation again.

The curious aftermath, though: the transformer used in that initial (hard saturated) test was never quite the same. Even with the coupling capacitor, it would always run louder than its brethren -- in fact, even though it might start with random flux (though the control started with an initial 1/4 wave, stopping could happen randomly anywhere in a cycle), it would always drift back towards saturation in the same direction it got magnetized in. I have a few possible explanations for the effect (though since this was over a decade ago, fewer and fewer exact details are remembered), but nothing real strongly convincing.

Suffice it to say, magnetic materials are weird. You see similar warnings in datasheets from time to time, mainly regarding NiZn ferrites, which can be damaged (hysteresis goes up, μ changes) from saturation, or even just being bumped (strain induced effects). Given that ferromagnetism is one of the Difficult Problems in Physics (strongly-coupled condensed matter), I don't feel that's an entirely bad cop-out.

The noise mechanism, by the way, was probably magnetostriction in the core. This is a normal byproduct of steel being magnetized (and many other magnetic materials), but being a square-law effect, it's normally fairly modest when centered around zero. In this case, the combination of extreme (into saturation) magnetization, and single-sided operation (i.e. it's staying towards saturation on one side), pushes operation deep into one side of that parabola, giving a strong fundamental output -- 1kHz whine. Whereas in normal operation, it alternates around the center, giving a quieter 2kHz tone.

It is interesting that the windings weren't varnished (custom / proto parts -- who cares), so could've been vibrating as well; and at the peak currents during initial saturation, that might be a contributing effect. The extent to which the whine varies with load current, implies how much this contributes; it wasn't much difference in this case, so core magnetostriction was likely dominant.

• Thank you for sharing your own experience :)
– Jess
Commented Aug 28, 2023 at 7:15
• If you add a resistor in parallel with the DC block capacitor to aid with damping of the resonance between it and the magnetizing inductance, do you not negate the benefits of including it there in the first place? Will the resistor not pass the DC current? Commented Sep 5, 2023 at 15:25
• @jvnlendm Yes, but much less. How much is tolerable, depends on the imbalance, and saturation of the transformer. Hence the note that an R+C may be necessary instead. Engineering is full of compromises, and "good enough" will do. Commented Sep 5, 2023 at 15:31
• Interesting - thanks as always for your input. Depending on the initial size of the DC block capacitor, though, inserting another C that is three times larger than the original might be tricky... Commented Sep 5, 2023 at 16:10

Soft start / power control circuits in larger converters are often designed to have equal length positive and negative cycles, and only step the length (for soft start, or current limiting) between whole cycles. This avoids DC bias.

As others have said in comments, the alternative is to use a series capacitor to totally remove DC bias currents.