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I am trying to understand the output waveform of this diode in series with capacitor circuit and I am using the constant voltage source model for diode.

I will recount what the professor has told in lecture "As the voltage increases , the capacitor is charged with the voltage of = Peak positive voltage of sinusoid input voltage - the diode voltage and will remain so for the rest of positive and negative cycles"

I am having trouble understanding the negative cycles , when the input voltage becomes negative then the diode is an open switch according to the constant source model.

And the negative terminal of capacitor that was previously connected to negative terminal of input voltage is now connected to positive terminal of voltage.

So we have a wire in between positive battery end and the negative capacitor plate ,isn't it against circuit theory rules of wire having no potential differences ?

How would that affect the output waveform ?

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And the negative terminal of capacitor that was previously connected to negative terminal of input voltage is now connected to positive terminal of voltage.

The lower terminal of the voltage source becomes more positive than its upper terminal but, that lower terminal is regarded as "ground" or 0 volts: -

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This means that the upper terminal falls to a negative value when Vin reverses direction. Ground or 0 volts is our reference node by which we compare other nodes with. It is immutable.

So, the wiring of the capacitor remains as shown in the circuit diagram; the negative pin of the capacitor remains connected to the lower terminal of the voltage source AND, that node is our 0 volt reference node. The upper pin of the voltage source will go negative of course and, that reverse biases the diode.

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