The phase noise plot for a particular crystal oscillator is here. The datasheet represents an entire series of oscillators which range in frequency from 1 to 75MHz. The phase noise plot is indicated as "typical" but shows that it was measured for a carrier frequency of 50MHz.
If a 5MHz frequency oscillator were selected from the series instead of 50MHz, would one expect it to have the same phase noise or proportionately lower phase noise? In other words, would it have higher RMS jitter or equivalent?
If the end goal is produce a 5MHz clock signal with minimal RMS jitter, is it generally advantageous to select the 50MHz model and divide* it by 10 or simply select the 5MHz model?
*I understand RMS jitter does not improve with clock division, but if the higher frequency oscillator has superior RMS jitter compared to the lower model, then this may be a winning strategy.