There is official documentation (Appendix F) on how to do compliance testing on USB 2.0 devices to ensure there is no back-voltage to hosts. Is there an analogous test for USB 3.0? My assumption would be to repeat the test they outline (depicted below) for the SuperSpeed pins relative to the GND_DRAIN pin on USB 3.0.
The USB 2.0 test is outlined below and requires that all TP voltages are < 400 mV.