Oscillation won't pass voltage buffer

Question

This is the full schematic of the circuit

theremin http://img443.imageshack.us/img443/9292/fulltheremin.png

Full size: http://img443.imageshack.us/img443/9292/fulltheremin.png

It didn't work on the first try.

A theremin is an electric instrument which emit a constant note and you can change it's tone (frequency) and volume (amplitude) with your hands and a pair of antennas.

On this schematic we have a theremin which only varies its frequency. There's 3 transistors, on the sides two BC546 (I'm using BC547B that have more hFE) that are working as oscillators each with its own tank circuit consisting on an 100uH inductor (L1/L2) and two capacitors of 27pF (C4/C13) and 15pF (C5/C14) on parallel. Either oscillator on both sides are the same and are quite responsive on frequency if I get my hands near them but, the left one has a 4.7K potentiometer (R10) on series with the 15pF capacitor to vary the base oscillation frequency and the right one should have an antenna connected to its transistor collector through a 15pF capacitor (C16), making it more responsive.

The output of both oscillators (OSC1 & OSC2) are fed to the output stage on the middle through 1M resistors (R8-R9) using direct coupling. This should sum them up in one signal and rise the impedance of the output signal.

The main problem is, on Q1 base, where the signals meet, there's no signal.

If I disconnect each oscillator, on OSC1 and OSC2 I get a healthy output of approximately 8Vpp 1~20KHz with an offset of ~10V with a new 9V battery.

For testing purposes I disassembled everything and reassemble only the left oscillator.

My mission: be able to make its output signal usable.

Using a 10nF decoupling capacitor on OSC1 I'm trying to buffer this output to get a stable audio signal without success.

I've tried a simple voltage follower with an LM358 Op-Amp but the signal won't show on the output.

I noticed while trying to offset the signal to Vcc/2 to feed it to my Op-Amp is that a 4.7K+4.7K voltage divider will drop down the signal to 0V just on the decoupled side of the capacitor, but with a 1M+1M voltage divider the signal will be kept healthy. So I guess it's an input impedance problem on the buffer side.

So I went with a common collector voltage follower with a second BC547B (collector to Vcc and a 1M resistor between emitter and ground, feeding the signal to its base), and I did get some but minimal and unusable output at the emitter. Before the output decoupling capacitor (emitter) on this voltage follower I got the offset-ed signal near Vcc, so I guessed the transistor was getting saturated by the high voltage signal.

Then I tried to divide the input signal by an order of magnitude with a 1M+100K divider before feeding it to the base, but the signal will be lost right after the decoupling capacitor on OSC1, just like it happened with the op-amp.

What should I try next?

I guess is obvious that I need a high impedance voltage follower but get a lower input signal too. But when I try to divide it before feeding to the buffer it will drop down to zero.

Answer 1

This is more a set of comments than an answer per se, but too long to fit in a comment.

Signal from oscillators: 8Vpp 1~20KHz with an offset of ~10V with a new 9V battery.

So the issue is how to couple this to another stage which can amplify it, but at the same time set an appropriate input voltage DC offset suitable to the next stage.

The obvious solution would be to use any amplifier design with reasonably high input impedance, and AC couple to it via a capacitor, so for example a cap from OSC1 to R8.

"The main problem is, on Q1 base, where the signals meet, there's no signal." Whatever voltage signal is at Q1 base will be quite small because the impedance at Q1 base will be small compared to the 1 Meg input resistors. (Especially for frequencies above the knee of the R5-C7 highpass filter.)

So the voltages at Q1 base may well be only 1/100 or 1/1000 of the signals into R8 and R9. In any case what you are more concerned with is the AC currents through R8 and R9 (and thence into Q1-base).

And probably also of concern is the DC voltage at Q1-base -- is it in a sensible range to bias Q1 to operate in it's active range, say with 3 to 4 V DC at Q1 collector? Since you have a 100k collector resistor on Q1, that suggests you are expecting a DC Ic of around 0.03mA to 0.04mA, and thus a DC voltage of rather precisely 0.03V-0.04V across R5 (and not, for example, 0.08V), but there's nothing to set a suitable voltage on Q1-base to make that happen so far as I can see.

Finally, what is the role of C9, 10nF? In parallel with R11 that appears to create a filter that will attenuate output above 160Hz or so, working to considerably suppress the signals in your range of interest, 1 kHz-20kHz.

It's difficult to say anything about what you wrote after "My mission: be able to make its output signal usable" because you don't show a schematic of what your did and it's hard to guess.

FWIW, if you feed an AC audio signal via a capacitor into a voltage follower (which has a high impedance input, hence shouldn't disrupt the source of the signal), you are going to get an output voltage that follows the input voltage. That's assuming you've set the DC level at the follower input to something reasonable. There's not much that can go wrong there, so we need to see exactly what you did that might have cause this to fail.

Bottom line, it looks like your challenge here may be simply understanding how amplifiers work (either op amps or with discrete transistors) and how to satisfy their input requirements for signal voltage or current, impedance, and DC bias (aka offset). Perhaps reading up on that topic might allow you to navigate more satisfactorily?

Answer 2

In your schematic, you use a common emitter amplifier design rather than a common collector amplifier design.

The DC coupling will disturb the biasing of the transistor. You should use a common collector amplifier with the collector directly connected to power supply. The Emitter resistor should be reduced to provide a bias point where collector current I𝒸 = 1mA

No capacitor can be aperiodic and still provide a larger bandwidth. Global gain is less than 1, and lower because 1 MOhms is in series for the 2 signals.

Gain is -4 dB, near 0,6 times. The impedance presented by the amplifier is very high, so to deliver a voltage the input signal will have to be very high and the output current will be very low.