I am an Intel Quartus user getting to know Xilinx Vivado. I am using Xilinx Vivado for the first time. I am using Digilent ARTY S-7 FPGA board for learning purpose.
I am have created a blinking LED program that I am able to synthesize. I can also see that the creators of the FPGA board have given me something called constraints file which is an XDC file. I cannot for the life of me find where the I/O planner GUI is supposed to be for the current active project.
I have the following questions:
- How do I open the Xilinx Vivado equivalent of Intel Quartus pin planner GUI? This is used to assign specific FPGA pins to specific ports of the user design and also specify the I/O standard.
- Does Xilinx Vivado put all constrains into a single XDC file rather than have separate files for timing constrains, I/O pin constraints, floor plan constraints, IP specific constrains e.t.c.?