The source-terminated reflected wave switching scheme is a familiar one. One just needs to add a source-series terminator, which added together with the driver's output impedance equals the line impedance.

I have, however, recently seen the following passage in Right the First Time Vol.1 [p.156] by Lee Ritchey and John Zasio:

There is no need for a separate series resistor if the driving voltage source impedance can be controlled to be equivalent to the transmission line impedance. The drive transistor size can be adjusted so that it produces a half amplitude transition into the transmission line. The impedance of the ON drive transistor acts as the termination. Figure 36.5 shows a half-series transmission line with a series terminated driver and load.

HSTL Series-Terminated Driver and Load


I'd like to know:

  1. how this adjusting the drive transistor size is accomplished. I'm assuming the author means on-the-fly adjustment, and not manufacturing adjustment.

  2. I've seen ASICS on which you can select a drive strength. I'd presume this is the same thing, or isn't it? Here's an excerpt from the datasheet of such an ASIC:

Drive Strength Register Settings

  • \$\begingroup\$ Why would you need to adjust it? Size the transistors to drive 50Ω (or whatever impedance the chip is intended to drive) in the design phase. \$\endgroup\$
    – John Doty
    Jan 17 at 15:39
  • \$\begingroup\$ @JohnDoty I am not designing the IC so I have no way of sizing the transistors by design. I can, however, configure the IC itself to use a certain transistor size. Or am I misunderstanding what you are saying? \$\endgroup\$
    – pfabri
    Jan 18 at 11:18
  • \$\begingroup\$ Sure, if the chip allows you to choose the size, do it that way. \$\endgroup\$
    – John Doty
    Jan 18 at 14:28

1 Answer 1


The approach to do this is alluded to in the datasheet snippet you linked, which mentions "fingers", or separate parallel gates in a wide MOSFET that forms the output driver. These fingers connect to parallel sources and drains, so when all of the gates turn on together, the arrangement acts as a transistor whose effective width is the sum of the constituent parts.

I don't have an image of an output driver that I'm allowed to share, but the diagram below shows how this kind of layout can be done (using low-voltage core transistors in a 180 nm process from TSMC). I'd imagine that output driver transistors (as opposed to fast, small core transistors) would be longer, wider, and perhaps have additional protection to protect against latchup and other damage induced by the outside world.

Note that each gate is separate (although I connected them to the same net), sources/drains are shared to save space, and everything's in the same diffusion (with dummies) for better matching. This particular design also shows a cascoded transistor, which might be desired in some cases (e.g. if the actual output drive were current-controlled by running the output transistor segments as if they were segments of a current mirror).

enter image description here

By only driving a selected subset of the gates, a desired width (and hence drive strength) can be achieved.

  • \$\begingroup\$ How is the subsetting accomplished? \$\endgroup\$
    – pfabri
    Jan 16 at 18:10
  • 1
    \$\begingroup\$ @pfabri Digital logic comes to mind - AND the gate drives with the desired subset. Could be that the four-bit control word in that datasheet switches a group of 8 gates with the MSB, a group of 4, a group of 2, and finally a single gate with the LSB (or e.g. 24/12/6/3 gates by each bit).As an analog designer, this is mostly an informed guess and I unfortunately don't have any more specific details than that. \$\endgroup\$
    – nanofarad
    Jan 16 at 18:16

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