Designing IGBT driver: question about datasheet specs

Question

Summary

I'm trying to design a driver for a high voltage, IGBT driver, using an optocoupler for isolation, and have a question about whether this design is compatible with some of the numbers in the datasheet, and whether this is a viable approach.

Background

For reference, the full datasheets are here (https://www.mouser.com/datasheet/2/427/VISH_S_A0003099403_1-2568458.pdf https://www.galco.com/techdoc/fuji/2mbi300ta-060_dat.pdf), although I will try to include all relevant information in this question.

Here is a simplified schematic of my design:

For this question, I'm focused on the high side driver. This is using a bootstrapped configuration, with the capacitor and diode to ensure a positive voltage from the IGBT's gate to emitter. The optocoupler lists a operating voltage from pin 8 to 5 of 15v:

Questions

1. I'm assuming while the high side of this configuration is on, the voltage coming out of the capacitor is going to sag due to leakage. I'm concerned there may not be enough margin to keep the optocoupler voltage high enough, but I'm not sure how much margin I need or how I should compute that.
2. When turning off the high side IGBT, is it sufficient to use the lower optocoupler transistor to connect G1 to E1 to shut it off, or should the gate be pulled to a negative voltage relative to E1, like a depletion mode MOSFET? I ask because I've seen other designs that use a negative power supply for this node, but I don't see anything in the IGBT datasheet that seems to indicate that.
3. Is there anything else I'm missing?

Answer 1

Your IGBT does not require a negative voltage to turn off. The data sheet specifications for turning off are made with zero volts from gate to emitter.

You can use negative Vge to slightly improve turn off time.

For the sizing of the power supply capacitor, look at the specification for the gate emitter capacitance. The gate capacitance is charged up on each cycle. IF you size your power supply capacitance at 10 times the gate capacitance, you can see that your power supply capacitor voltage will be depleted by 1/10 of it's original charge.
There is 400 nA leakage in the G-E circuit. So, if you are using very low frequency repetition rate, your power supply volts could sag.

For your # 3 item: make sure that you leave a small amount of time after turning off Q1 before turning on Q2 to prevent shoot through (both transistors on). Make sure your diode is fast or ultra fast for reverse recovery losses.