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I want to use a low pass filter for the input of my ADC, and I would like to choose the most appropriate cut-off frequency based on the sampling rate of the ADC, which is 40 SPS. Is there a simple mathematical relationship or practical rule to evaluate the most appropriate fcut? For now, I'm using 20Hz as a temporary value, which is already fast enough for my purpose.

Thank you.

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    \$\begingroup\$ You have to be as far below 20 Hz as possible without attenuating your signal you are interested in. If you want to add a low-pass without doing any real design, probably you should multiply the highest signal frequency * 20 Hz, and then take the square root. That is the geometric mean of your signal frequency and the aliasing frequency. Put the cutoff of your filter at that geometric mean. \$\endgroup\$
    – user57037
    Jan 17, 2022 at 8:30
  • \$\begingroup\$ Check the documentation of your ADC. Many of them use oversampling and decimation. That means you only need to meet the Nyquist requirements for the higher sampling rate. It makes your antialiasing filter much easier to get right. \$\endgroup\$
    – JRE
    Jan 17, 2022 at 9:21

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The Nyquist sampling theory states that your sample rate needs to be at least 2 times the highest frequency component of your input signal to prevent aliasing.

Aliasing is a phenomenon where higher frequency components “fold” back into your signal and cause interference. It’s not very desirable. If your cutoff frequency is 1/2 your sample rate, that means signals at 20 Hz will be attenuated by 3dB, and the rolloff rate beyond that depends on the order of the filter you use. This means that you will have some aliasing, but the aliasing caused by higher frequencies will be weaker than if you had no filter.

How much aliasing you can tolerate depends on the application, but it’s good practice to make the cutoff frequency as low as you can tolerate, and the filter order as high as you can tolerate. This will be the best approach to preventing aliasing in your digital signal and filtering out high frequency signals. In general, I typically try to make the cutoff frequency of my anti-aliasing filter to be 1/10th of the sample rate, but this isn’t always necessary, and it’s not always good enough either.

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  • \$\begingroup\$ Thank you so much for your explanation, so I'm sticking with 5-20 Hz or so, depending on what speed best suits my needs. It may seem trivial, but in real circuits, to lower the fcut is it better to increase the values of the capacitors or resistors in an RC filter? Mathematically nothing changes, but reality is another story, I usually prefer to increase capacitor capacitance, I hope this is correct. \$\endgroup\$
    – boromyr
    Jan 17, 2022 at 0:20
  • \$\begingroup\$ You usually just want to pick practical values for your components. Specifically if your resistor values are too low you might deal with large power loss, or if they’re too big you’ll suffer from the effects of input bias current. A capacitor that’s too large will take up lots of space/be expensive. \$\endgroup\$
    – Ryan
    Jan 17, 2022 at 3:55
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An engineer would not start from here.

First, the signal. What frequency components are you interested in?

Then, the noise. Are there discrete frequency sources you must reject? Is there a general noise floor you simply want to reject as much of as is practical?

Then the potential aliasing. Can your source generate higher frequency signals that you're not interested in, but must not see as low frequency signals?

Design a filter to separate the noise adequately for your signal to noise specification.

Choose an ADC with a suitable sampling rate.

However, you've started with the sampling rate. From which we can infer that you are going to put only slowly changing signals into it. But still have no idea whether there will be any high frequency signals that you must reject, and by how much (hint rejecting to 0.01% requires twice the filter that rejecting to 1% requires).

So to make this ADC into a 'general purpose' ADC, my first recommendation would be to use a 10 Hz cutoff filter (so that's well below the 20 Hz Nyquist frequency, to allow space for the filter's transition band), and make it third order Sallen Key (which you can do with one op-amp, where its RC input stage mitigates the SK's tendency to lose stopband when the opamp runs out of bandwidth), using a Bessel design (to minimise the response time to step inputs).

You'll notice I made a lot of assumptions about what you need out of your ADC system. If pulse distortion is not a problem, then use a Butterworth or even Cheby design for a deeper stopband. If alisasing is not a problem, you could reduce the filter order, even down to first order if you're just rejecting noise and your signal source cannot generate alias signals, like an analogue reading thermometer perhaps.

So my second recommendation is, just whack a 5 Hz single pole RC on it, try it, and see whether it works for you. If it doesn't, modify as required. Maybe that should be my first recommendation!

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    \$\begingroup\$ All of your points are correct. I need to measure signals from a load cell, so they are ideally flat and any signal above 5-10Hz is already noise for me. Also on the noise you are right, at the moment I do not have the possibility to measure it, so as an initial reference I use the SPS to have a certain reference. The filter I'm using is a Sallen Key type. \$\endgroup\$
    – boromyr
    Jan 17, 2022 at 9:53
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To avoid aliasing, choose your filter cut off frequency to be as low as you can and, make the filter order as high as is convenient. If you really want to know what you need, you need to study how aliasing can cause you problems. Here's a picture that might help: -

enter image description here

The top picture shows the sampling frequency and Nyquist frequency (half sampling frequency). It also estimates that you might be interested in a baseband of 8 Hz (just a guess on my part).

Given that 8 Hz is 12 Hz lower than the Nyquist frequency (20 Hz), the lowest frequency that can cause aliasing is 32 Hz (12 Hz above Nyquist).

The lower picture shows how you might implement an anti-alias filter. That filter will attenuate artefacts at 32 Hz (and above) by a certain amount so that if they do "alias", their impact is minimal.

So, you set the anti-alias filter cut-off frequency to be at the edge of your baseband and choose the filter order to reduce the first aliasable artefact to levels where you don't have concerns if it does get aliased.

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  • \$\begingroup\$ Thank you for your explanation and the graphs. Would this criterion also apply if the filter serves as an input for an oscilloscope? Specifically, a DIY oscilloscope with STM32, 200KHz bandwidth with 1MSPS ADC. I'm using Analog Device's Filter Design Tool, and in order to create a suitable filter that leaves a signal intact down to 200KHz, I need to cut -3dB 500KHz as a minimum. \$\endgroup\$
    – boromyr
    Jan 20, 2022 at 16:37
  • \$\begingroup\$ @DavideRomeo you've accepted an answer now and you appear to be also asking a new and only slightly related question. \$\endgroup\$
    – Andy aka
    Jan 20, 2022 at 17:38
  • \$\begingroup\$ The question is identical: can I use the same concept you explained to me for 1MSPS as well? The only constraint this time is that I do not want to change the signal below 200KHz. \$\endgroup\$
    – boromyr
    Jan 20, 2022 at 20:29
  • \$\begingroup\$ Ask a new question please. \$\endgroup\$
    – Andy aka
    Jan 20, 2022 at 21:00

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