# Operating Region for Transistor in Capacitance Multiplier

I want to understand what is the desired operating region for a transistor in a capacitance multiplier circuit being used to remove power supply ripple.

Consider the circuit in the attached image. From what I understand, depending on R1 and R2, for a given signal with some ripple, the base voltage will either be low, causing the base collector junction to be reverse biased, and the transistor will be in the active region, or the base voltage will be higher, causing the collector-base voltage to be lower, and the transistor will be in saturation. Is this correct?

Which of these is a more desirable mode of operation for the transistor? My understanding is that we don't want the transistor to be in the active region, because then if the load draws more current, there will be proportional rise in base current and a drop in the base, hence output, voltage. On the other hand, in the saturation region, a change in output current will not lead to much of a change in base current, hence no change in base or output voltage. Is my understanding correct?

If my understanding is correct, we should bias the base so that it is very close to V+, in which case should we not just omit R2?

Thanks

It's an emitter follower circuit and this means that the emitter voltage follows the base voltage. That's the simple way of putting it. In fact the emitter voltage must be about 0.5 volts to 1 volt lower than the base voltage in order force sufficient current into the base. This is because the base-emitter region is equivalent to a forward biased diode hence, we say that the emitter "follows" the base but, maybe, 0.7 volts lower (in simple terms).

So, we have to accept that fact first: the emitter is around 0.7 volts lower than the base voltage and remains roughly 0.7 volts lower than the base voltage irrespective of the load current.

But, we don't want ripple on the collector to cause this type of voltage regulator to "drop-out". Yes, it's a type of voltage regulator and yes, it can suffer from "drop-out" should the ripple on the collector be too big. To avoid this we make sure that the potential divider formed by R1 and R2 lowers the base voltage by an amount sufficient to ensure that the base voltage is always lower than the lowest "valley" voltage on the collector when there is ripple present.

We also ensure that the values of R1 and R2 are low enough so that any extra current taken into the base (due to emitter load variations) do not significantly cause the base voltage to droop too low. A rule of thumb here would be to choose R1 and R2 values that are about ten times the resistance of the lowest load resistor value on the emitter. So, if the emitter load might be 50 Ω, we would choose R1 and R2 to offer an equivalent resistance to the base of no more than 500 Ω.

So, the transistor will be in its active region

But, as always, there will be compromises and, under extreme values of ripple voltage on the collector, it may just start to hit the saturation region. This is down to how much ripple you can tolerate and for how long. There is no general rule here; it's entirely dependent on what the voltage on the emitter needs to be to suit the requirements of what is connected to the emitter.

Which of these is a more desirable mode of operation for the transistor?

Generally, it's desirable for the transistor to operate in its active region.

If my understanding is correct, we should bias the base so that it is very close to V+, in which case should we not just omit R2?

No, that wouldn't be very good because then you are relying on base current (with zero current amplification in the BJT) for supplying load current. Generally you want the average voltage on the base to be a volt or so below the valley voltage on the collector when ripple is present.

Footnote - in my experience, it's better to use more capacitance on the power feed line than expect miracles from these types of circuits.

<<< Which of these is a more desirable mode of operation for the transistor? >>>

It is absolutely obvious that the transistor will have to work in "linear" mode, otherwise it would not be of much use in the context of DC "power supplies".

In this case, the AC analysis shows the obtained attenuation of the ripple present at the input (~35 db at 100 Hz, 50 Hz x 2).

It is worth highlighting the following two facts:

Be careful with one problem that may occur... (E&EO). If C1 is charged and Vin ("capacitor" after rectifier) goes to zero faster than Voltage across C1, there can be a reverse current through the collector-base ... which can destroy easily the transistor. So, R1 is really necessary.

Note also that the transistor will be destroyed if you make a short at output (C1 discharge through junction B-E)!

You can leave R2 out if the difference Vbe-Vce(sat) is considerably greater than the input ripple voltage. The transistor will then always be in the active region. That's what you want.

This isn't a circuit you'll want to use every day, but it's a good way to knock a millivolt of broadband noise down to a few microvolts for powering a circuit that's touchy about noise but not so touchy about regulation of its power.