What I want to know is the physical implementation of the receiver
Well I cannot give you schematics (beyond the scope of this site) but I can say a few words about the problems and what needs to be overcome.
The tricky bit is knowing the actual phase of the received signal and, trying to decode the demodulated data to a 1 or a 0. Basically, the receiver cannot initially know the phase of the signal and therefore, it cannot interpret the initial signal as a 1 or a 0. It has to wait until the phase changes and then it can "frame" the received signal correctly.
But it's a bit more complex; the transmitter cannot send out a whole bunch of logic 1s (or 0s) and expect the receiver to keep track of a constant phase signal ad infinitum; the data has to be encoded to prevent an excessive number of contiguous 1s or 0s being transmitted.
It can do this by Manchester encoding (a wasteful scheme) or by data scrambling (symbol and BW efficient). Of course the receiver has to understand the encoding/scrambling but, that's trivial. The receiver also has to know the baud rate but again, that is also trivial.
So, once the receiver aligns itself with data edges, it can start to sample the demodulated data in the middle of the symbol but, several to tens of initial bits will be lost prior to full alignment (unlike a UART where it's expected to be up and running in an instant).
This may sound wasteful but, but consider that all radio data transmission systems have to use what is known as a data preamble when a packet is sent so that the receiver can align its RF circuits to the signal. The preamble is just a series of 1s and 0s encoded in such a way as to make it distinguishable from normal data. This preamble allows the receiver to lock-in to the transmission and decode initial data that doesn't form part of the payload message.
In other words, when the receiver eventually locks-in to the preamble, it expects data to follow. Here's an example for FSK data transmission but, it's pretty much the same for PSK: -
To the right of the picture is when real payload data would become transmitted (and hopefully received correctly).
Picture originally used here: -
The links above may also make interesting reading. You might also be interested in how a receiver has to lock-in to the amplitude of a carrier. Clearly, if the modulation is pure FSK or PSK then the RF stage can operate at full gain and "lose" amplitude artefacts but, if a QAM scheme is involved then, an AGC circuit has to try and make the best SNR from the incoming RF signal as well: -
Picture from Why is this Arduino RF Receiver changing value back and forth so much?.
