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After uploading my PCB design for manufacture, I got an error message about an input pin (#14) of one of the ICs (U4; a TDA7560 amp) being connected to GND and GNDA:

Result  Source net  Source pad  Destination net Destination pad R [Ω]
  Short GND         D1 / 2      NET-(C22-PAD1)  C22 / 1         0
  Short GND         D1 / 2      GNDA            D4 / 2          0
  Short GNDA        D4 / 2      NET-(C22-PAD1)  C22 / 1         0

But: I have never defined such a connection in the KiCad schema I had drawn:

schema

There is just one connection to one of the outputs of the mixer chip on the left via coupling cap and nothing more.

Nevertheless, after generating the net file, constructing the PCB layout, and making FreeRoute do all the routings, I got a conductor path (Net–(C22–Pad1)) crossing the net tie (!) between GND and GNDA. See the path highlighted in pink, which should only connect the C22 cap with pin #14 of U4:

faulty path

It collides both with GND, and with GNDA where the net tie connecting GND and GNDA lies. Is this a bug in KiCad's Pcbnew or FreeRoute?

UPDATE: When correcting the PCB layout, I found out that the net tie was in fact connected to the NET-(C22-PAD1) path with a narrow white line. See the screenshot below. Does this mean that the wrong connection was already in the net list? Then it becomes somehow mysterious why the DRC didn't warn me.

PCB detail with white lines

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  • \$\begingroup\$ Look very carefully at that pin 14, it appears to be sitting atop something else that makes it pink in colour. \$\endgroup\$
    – Andy aka
    Jan 19, 2022 at 21:40
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    \$\begingroup\$ That routing over the net tie looks suspiciously like a short circuit which KiCAD caught correctly \$\endgroup\$
    – nanofarad
    Jan 19, 2022 at 21:42
  • \$\begingroup\$ @Andyaka I marked the path in question and the pads it connects intentionally! \$\endgroup\$
    – Neppomuk
    Jan 19, 2022 at 21:44
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    \$\begingroup\$ Seconding @nanofarad, that's probably your problem. But I'd like to also add that autorouters are generally to be avoided, manual routing usually gives better results (and to me at least, is a relatively enjoyable part of the process). \$\endgroup\$
    – Hearth
    Jan 20, 2022 at 6:09
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    \$\begingroup\$ It seems highly likely that this is a bug in the autorouter. Net ties are a little weird and it's not surprising that there would be bugs around them. Much more likely than an issue with the net list. \$\endgroup\$
    – DamienD
    Jan 20, 2022 at 22:02

2 Answers 2

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Hover/select D1, press M, move it out of the way, then D4 and C22. Check for suspicious wiring; delete and redo them, but they are probably fine. In my experience, KiCAD will complain if you violate design rules, both at schematic stage and PCB stage. Problem is, you loaded the netlist into an external tool and autorouted it; KiCAD was then unaware of the changes. Perhaps it should be, but a DRC check is not done automatically.

Looks to me like the highlighted track was erroneously ran overtop the GNDA track or vice-versa by the auto-router. If so, FreeRoute lived up to it's cost (free.) Always do a DRC (design rule check) before fab.

As a bodge, cut that skinny track right near GNDA on both sides. Just touching it with a dremel cut-off disc is very fast. Then run a wire from U4.14 to C22. 30ga Kynar wire works great for this; use an x-acto blade to cut the insulation by rolling the wire under it gently.

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  • \$\begingroup\$ That's the point: Neither Kicad, nor the autorouter complained about the the path collision! It was the board manufacturer (Aisler) who came up with the warning. \$\endgroup\$
    – Neppomuk
    Jan 20, 2022 at 20:08
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After examining the (faulty) PCB I got from the factory, it turned out that the net tie in fact has two conductor paths: one in the front side of the board, and one on the back side! Of course, one such path would have been sufficient, and the pink path from the screenshot above crossed the front conductor of the net tie.

I simply used a sharp knife to separate the crossed paths, and that's it.

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