Consider the quadratic equation for RdsOn depends on the square of the difference of the gate to threshold voltage of reaching the rated RdsOn.
The mass production of FETs has a wide tolerance for Drain Threshold current from Gate to source voltage. The traditional FETs have a Vgs(th) rating from 2 to 4V or so. In the last decade over 50 thousand new FET varieties have been produced and many for Logic level voltage control with a lower threshold range than the 2 to 4V range.
Typically for the traditional 2 to 4V FETs you want at least 250% more gate voltage than the Vgs(th) aka Vt. (this was your mistake)
For the logic level FETs with thresholds that permit 3V control the thresholds must be below 50% of the minimum control voltage or less.
As these are cost-sensitive choices choose the best match using the RdsOn max and Vgs minimum that you can guarantee and determine the temperature rise of heat dissipation for the current and RdsOn that you need to avoid excessive junction temperature rise such as > 60'C which affects MTBF.
Details on FET parameters