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I'm referring to the Wikipedia page about virtual memory, the last paragraph in Usage section:

Embedded systems and other special-purpose computer systems that require very fast and/or very consistent response times may opt not to use virtual memory due to decreased determinism; virtual memory systems trigger unpredictable traps that may produce unwanted and unpredictable delays in response to input, especially if the trap requires that data be read into main memory from secondary memory. The hardware to translate virtual addresses to physical addresses typically requires a significant chip area to implement, and not all chips used in embedded systems include that hardware, which is another reason some of those systems don't use virtual memory.

However, for example in the CodeWarrior IDE (used with NXP MCUs) or the STM32 Cube IDE (used with STM32 MCUs), we can see memory monitors of virtual memory, like this one:

enter image description here

How do microcontrollers deal with memory addressing and memory address translation? What is this "significant chip area"?

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    \$\begingroup\$ That screenshot says "memory", not "virtual memory". \$\endgroup\$
    – pjc50
    Commented Jan 25, 2022 at 10:25
  • \$\begingroup\$ There is no "Virtual Memory" in your example, and I think you'll be hard-pressed to find an example of a microcontroller which supports virtual memory. \$\endgroup\$
    – brhans
    Commented Jan 25, 2022 at 12:54
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    \$\begingroup\$ Yeuop, study the unique benefits and features offered by virtual memory and then consider which embedded applications require at least one. Those that do, will usually include a kernel of some kind to manage it which is often found as part of an operating system environment. None of my embedded applications have required even so much as one feature and most have specifically required that I don't use a virtual memory system. But none of them have required Linux or freeBSD, either, and I wrote my own O/S when the application benefits from threads. Doesn't stop others, though. \$\endgroup\$
    – jonk
    Commented Jan 25, 2022 at 13:07
  • \$\begingroup\$ Don't make the mistake of thinking that "embedded system" implies a microcontroller. More sophisticated embedded systems can use what is is essentially a single board computer running a full operating system like Linux. Having said that, recent microcontrollers might have sophisticated memory management such as separate data and instruction busses with caching. This is not the same as virtual memory, but the consequences can be similar. \$\endgroup\$
    – Supa Nova
    Commented Jan 25, 2022 at 18:18

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The hardware to translate virtual addresses to physical addresses typically requires a significant chip area to implement, and not all chips used in embedded systems include that hardware, which is another reason some of those systems don't use virtual memory.

This is called an "MMU". To be clear, it's not separate, if present it will be part of the same die as the microcontroller.

Generally Cortex-M systems do not have an MMU, and Cortex-A do.

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  • \$\begingroup\$ Thank you sir. And does Cortex-M systems (as they don't have MMU) have any other special chip to translate addresses? Or they do not use virtual addressing at all? \$\endgroup\$
    – yeuop
    Commented Jan 25, 2022 at 10:23
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    \$\begingroup\$ I don't think they have any other address translation. \$\endgroup\$
    – pjc50
    Commented Jan 25, 2022 at 10:25
  • \$\begingroup\$ Virtual addressing requires a MMU in order to map the real memory into the virtual address space. Cortex M do not use virtual addresses or addressing. All the peripherals and memory have fixed addresses. \$\endgroup\$
    – Kartman
    Commented Jan 25, 2022 at 11:54
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The significant area comes from the page tables : this is an array of addresses, i.e. a significant chunk of memory, forming a lookup table where the HW (the MMU) looks up the physical address mapped to a virtual address (and complains if the virtual address is unmapped). These page tables are the bulk of the MMU area.

The complaint is known as a "page fault" and is handled by the operating system fetching the virtual memory contents from disk, into a free page of physical memory. This may involve freeing up some phys memory first. Typically involves finding the oldest ("least recently used" or LRU) page, saving it to disk, marking its pager table entry as unmapped, and then marking the new pager table entry with the newly freed physical address before loading the new data.

Small embedded systems don't have this translation; the "virtual" address IS the phys address.

(They often don't have an operating system, or indeed a disk either!)

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