You don't detail your application or the target equipment, so I'll presume there's some confidentiality or secrecy that stops you doing so. I'll presume you're trying to put serial test data into existing equipment.
You say that your data is coming from a laptop, so you can only use USB or, if it has it, a COM port.
The COM port is UART over RS232C and the latter won't do anywhere near 5 Mbps, regardless of what you can get out of the UART.
That leaves you with USB. You can either take that into the hardware you want or connect an off-the-shelf communications IC or a USB-to-comms adaptor module.
For ICs, an example is the FTDI FT232HP USB 3.0 Bridge. This connects to USB 3.0 on one side and has two interfaces on the other side. One is a UART for up to 12 Mbaud. The second is a FIFO with 8-bit parallel bus and handshaking, which can handle up to 8 MB/s async or 40 MB/s sync. Both well exceed your 5 Mbps requirement.
If you haven't got a USB 3.0 port, another example is the FTDI FT245R USB FIFO IC. This connects to USB 2.0 on one side and has an 8-bit parallel port with handshaking on the other. It can handle up to 1 MB/s, same as 8 Mbps and exceeding your 5 Mbps requirement.
There are other USB-to-parallel bridge ICs on the market that you can look into.
For adaptors, you may be able to find a USB to RS485/etc. unit with a UART that can handle 5 Mbps. The RS485/etc bus standards can manage the bitrate, it's the USB-to-UART electronics that you'll have to be sure of. They'll also use these off-the-shelf USB bridge ICs.
In both cases, the communications path will present itself to Windows as a virtual COM port. Linux will have an equivalent, if that's what you'll be using.
You'd need to interface to the FT245R to something to (a) manage FIFO controls and (b) convert parallel data or UART communications to a serial stream with clock for your target equipment. That's a CPLD or FPGA (never an MCU) and some very short and simple firmware. If you're competent in VHDL, you can buy an FT245R board and a cheap CPLD/FPGA board and have that part built and going in a couple of days. Always prove your VHDL design in simulation before trying it on the board.
It is possible to implement the USB interface in the FPGA but a lot of work compared to the low cost of the USB bridge ICs. It depends on your constraints of cost, units to make, development schedule etc., none of which are stated in your question.
The harder part is getting the sustained transfer rate out of the laptop's USB drivers. The USB standard's speeds are one thing but Windows and its USB drivers are not great at maintaining high or flat-out communications speeds, from development experience. So you need to consider if your application can accept pauses and hiccups in communications and how it would be dealt with.
Another problem is how to throttle the PC's data transmission rate to match the rate of data consumption at the equipment. You would need some feedback over the virtual COM port to do transmission start/stop, which requires sufficient RAM at the CPLD/FPGA while the PC is receiving the start/stop and acting on them.
