I read an introduction for the CMOS inverter from , and it mentions: "In steady state, there always exists a path with finite resistance between the output and either VDD or GND. A well-designed CMOS inverter, therefore, has a low output impedance, which makes it less sensitive to noise and disturbances".
I don't understand how the low output impedance influence the noise of the inverter. If the inverter directly links to a transistor, does the low impedance of the inverter still help the noise immunity?
 J. M. Rabaey, A. P. Chandrakasan, and B. Nikolić. Digital integrated circuits: a design perspective, volume 7. Pearson education Upper Saddle River, NJ, 2003.