The book But How Do It Know? presents an 8-bit computer architecture in which arithmetic-logic instructions (that is, instructions which are executed by the ALU) have 1 as the most significant bit, and are defined by the next three bits, while the others have 0 as the most significant bit.
In particular, the addition instruction has binary op code 1000, and the architecture seems to take advantage of this default 000 (which is the same as not sending any value in the three bits of the instruction selection "mini-bus") in order to perform sums of given A and B byte inputs in the arithmetic-logic unit during other non-logic instructions. In other words, if no other ALU operation is selected, then by default the values of inputs A and B will be added while executing other, non-ALU, instructions.
Given three consecutive bytes of memory, namely: a non-ALU instruction called DATA that moves a byte in memory to a general purpose register, the byte to be moved, and finally the byte of the next instruction, which would otherwise be in the second position (since instructions usually occupy one byte);
and also given a six-step stepper (seven, but the last one immediately returns to the first);
...we have the following, according to the book:
After the first three steps of the instruction cycle, which fetch the DATA instruction of opcode 0010, the fourth step moves the second byte to the register, and, although there is no evidence in the image below, it takes the opportunity to add input A from the instruction address register (IAR) to input B which has the "Bus 1" bit enabled (and which makes it a fixed byte evaluating to 1). This results, in the accumulator register (ACC), in the value of the position which follows the instruction stored in IAR, which falls in the third consecutive byte (since the IAR already came from step three with an incremented position in relation to the position of the DATA instruction).
My question is whether this implicit behavior of adding inputs A and B, even as other non-ALU instructions are executed, is a common design in computer architecture (say, for the purpose of optimizing the steps of the instruction cycle).
It raises two other questions that I wanted to confirm: first, in the case that behavior is the default, then what is done with input B when you want to avoid it, that is, when you don't want to perform the sum and instead store only the value of input A in the accumulator register?
I imagine that in order to achieve this, input B needs to receive a 0-valued byte (so that the sum A + 0 = A effectively occurs, which is the same as if it didn't occur at all). But its value always comes from the bus or the TMP register which precedes the input B (and which only has the "Set" bit and not the "Enable") and I don't see any possible way to set this value to zero, except by setting the TMP register to zero in the instruction before the current one. Is that what is usually done?
Hence as a last question, it was not clear where this "Set" bit of the TMP comes from (I think it should come from the control section whenever necessary, but I didn't see that bit being set in the book, so I'm not sure about that). Although, by confirming the previous doubt, it is already implied that this last assumption is correct.
In fact, all those questions can be summed up into a single one, which is to confirm whether these mutually related assumptions of mine are correct.
I still have another question which is where the 0-valued byte set in TMP comes from, but that would require further details about the architecture which I prefer not to include here.