(The question is at the end of the text.) In have a recurring application, where I want to clamp ESD strikes into a sensitive high-impedance into a guard node using antiparallel diodes.
The two basic requirements for D1 and D2 are:
- low ideality factor (i.e. \$n\approx1\$) to have low leakage at very low bias [as Sphero notes, it's actually the product of \$n\$ and \$I_S\$ that's important with \$I_S\$ being dominant.]
- good peak current handling
There are a few devices which do well to mediocre at this task, e.g. diode-connected transistors, JFET gate junctions or TVS diodes in forward-mode.
In contrast, as a matter of fact, nearly everything marketed as a "regular diode" completely fails at this task, as do Schottky diodes. Those devices (with a few exceptions) seem to be intentionally made with rather high ideality factors giving them abysmal leakage at low bias.
What is the advantage of these high ideality factors and how are they realized in the actual devices from a device-making point of view?