# FPGAcontrolling VGA: why does the monitor show a right triangle and not an isosceles one?

I'm trying to draw on a monitor by using an FPGA (SPARTAN 3A) and by considering a monitor with 640x480@60 Hz of resolution. In my code, I would like to start from a certain pixel (320,190) and to draw an isosceles triagle with vertex at (320,190) and with height of 100 pixels. To do so, I defined a variable H_address_up which should take the values of the right side (and works properly) and a variable H_address_down which should take the values of the left side, but it just corresponds to its height. I'm not understanding this behaviour and why it is wrong.

If someone could help me, I would be very gratefull.

I attach the code.

module Module_DisplayMonitor(
input     clk,
input     rst,
input     Hdisplay, // it is 1 when the horizontal counter is in the display area
input     Vdisplay, // it is 1 when the vertical counter is in the display area
input [10:0]    H_Address, // For horizontal coordinates in the display area
input [10:0]    V_Address, // For vertical coordinates in the display area

output reg [3:0] Green,
output reg [3:0] Blue,
output reg [3:0] Red
);

reg signed [10:0] H_increment;
reg [10:0] V_increment;

always@(posedge clk) begin

if(Hdisplay && Vdisplay) begin
H_increment <= 0;
V_increment <= 0;
// Triangle
//Cyan
Red <= 4'b0000;
Green <= 4'b1111;
Blue <= 4'b1111;

H_increment <= H_increment + 10'd1;
V_increment <= V_increment + 9'd1;

// Black Background
Red <= 4'b0000;
Green <= 4'b0000;
Blue <= 4'b0000;
Red <= 4'b0000;
Green <= 4'b0000;
Blue <= 4'b0000;
end
end else if (rst) begin
Red <= 4'b0000;
Green <= 4'b0000;
Blue <= 4'b0000;
end
end
endmodule

• I’m voting to close this question because it's not EE Feb 7 at 12:41
• Simulation should answer your question. Even writing some javascript would allow you to test and modify your algorithm. Feb 7 at 12:43
• Which monitor? If it scales or zooms the perfectly correct 4:3 video to something else then it is not correct any more. Feb 7 at 13:55
• I don't know what you think the mathematical description of a triangle is, and that isn't it. What's going on with all of those "up", "down" and "increment" signals? Feb 8 at 1:07

Try something like this as the body of your module:

  parameter v_start = 11'd190;
parameter v_end   = 11'd290;
parameter h_center = 11'd320;

/* "width" starts counting up from zero starting at the v_start line.
* We then define the first and last pixels of the triangle on each line
* based on width.
*/
wire [10:0] width = V_Address - v_start;
wire [10:0] h_start = h_center - width;
wire [10:0] h_end = h_center + width;

always @(posedge clk) begin
if (Hdisplay && Vdisplay) begin
/* active display area */
) begin
/* pixels that are in triangle (cyan) */
Red <= 4'b0000;
Green <= 4'b1111;
Blue <= 4'b1111;
end else begin
/* pixels not in triangle (black) */
Red <= 4'b0000;
Green <= 4'b0000;
Blue <= 4'b0000;
end
end else begin
/* blanking (black) */
Red <= 4'b0000;
Green <= 4'b0000;
Blue <= 4'b0000;
end
end